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| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-25 15:17:44 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-26 16:21:06 +0000 |
| commit | 5c6aa01affe14c40efdebdc9450cdbc4ae0bc494 (patch) | |
| tree | 4642c4f18dec3b95d02884414f2bc5124c756dc8 /lib | |
| parent | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 (diff) | |
| download | platform_external_arm-trusted-firmware-5c6aa01affe14c40efdebdc9450cdbc4ae0bc494.tar.gz platform_external_arm-trusted-firmware-5c6aa01affe14c40efdebdc9450cdbc4ae0bc494.tar.bz2 platform_external_arm-trusted-firmware-5c6aa01affe14c40efdebdc9450cdbc4ae0bc494.zip | |
Add workaround for errata 1073348 for Cortex-A76
Concurrent instruction TLB miss and mispredicted return instruction
might fetch wrong instruction stream. Set bit 6 of CPUACTLR_EL1 to
prevent this.
Change-Id: I2da4f30cd2df3f5e885dd3c4825c557492d1ac58
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a76.S | 34 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
2 files changed, 42 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S index 6bf88457b..ac513432f 100644 --- a/lib/cpus/aarch64/cortex_a76.S +++ b/lib/cpus/aarch64/cortex_a76.S @@ -190,6 +190,34 @@ vector_entry cortex_a76_serror_aarch32 end_vector_entry cortex_a76_serror_aarch32 /* -------------------------------------------------- + * Errata Workaround for Cortex A76 Errata #1073348. + * This applies only to revision <= r1p0 of Cortex A76. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ +func errata_a76_1073348_wa + /* + * Compare x0 against revision r1p0 + */ + mov x17, x30 + bl check_errata_1073348 + cbz x0, 1f + mrs x1, CORTEX_A76_CPUACTLR_EL1 + orr x1, x1 ,#CORTEX_A76_CPUACTLR_EL1_DISABLE_STATIC_PREDICTION + msr CORTEX_A76_CPUACTLR_EL1, x1 + isb +1: + ret x17 + endfunc errata_a76_1073348_wa + +func check_errata_1073348 + mov x1, #0x10 + b cpu_rev_var_ls +endfunc check_errata_1073348 + + /* -------------------------------------------------- * Errata Workaround for Cortex A76 Errata #1130799. * This applies only to revision <= r2p0 of Cortex A76. * Inputs: @@ -272,6 +300,11 @@ func cortex_a76_reset_func bl cpu_get_rev_var mov x18, x0 +#if ERRATA_A76_1073348 + mov x0, x18 + bl errata_a76_1073348_wa +#endif + #if ERRATA_A76_1130799 mov x0, x18 bl errata_a76_1130799_wa @@ -344,6 +377,7 @@ func cortex_a76_errata_report * Report all errata. The revision-variant information is passed to * checking functions of each errata. */ + report_errata ERRATA_A76_1073348, cortex_a76, 1073348 report_errata ERRATA_A76_1130799, cortex_a76, 1130799 report_errata ERRATA_A76_1220197, cortex_a76, 1220197 report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 3dcaecfe8..02208f0e8 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -131,6 +131,10 @@ ERRATA_A75_764081 ?=0 # only to revision <= r0p0 of the Cortex A75 cpu. ERRATA_A75_790748 ?=0 +# Flag to apply erratum 1073348 workaround during reset. This erratum applies +# only to revision <= r1p0 of the Cortex A76 cpu. +ERRATA_A76_1073348 ?=0 + # Flag to apply erratum 1130799 workaround during reset. This erratum applies # only to revision <= r2p0 of the Cortex A76 cpu. ERRATA_A76_1130799 ?=0 @@ -220,6 +224,10 @@ $(eval $(call add_define,ERRATA_A75_764081)) $(eval $(call assert_boolean,ERRATA_A75_790748)) $(eval $(call add_define,ERRATA_A75_790748)) +# Process ERRATA_A76_1073348 flag +$(eval $(call assert_boolean,ERRATA_A76_1073348)) +$(eval $(call add_define,ERRATA_A76_1073348)) + # Process ERRATA_A76_1130799 flag $(eval $(call assert_boolean,ERRATA_A76_1130799)) $(eval $(call add_define,ERRATA_A76_1130799)) |