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author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-11-13 16:22:52 +0000 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-11-13 16:22:52 +0000 |
commit | 0efb83e1cd72afdab36fce92dd1c508020de225b (patch) | |
tree | c5962d48ea3ed9965af9afecb4f3e80f5244f72d /lib | |
parent | 63b96271909dd3ae9544128bd6d3b74c66e11c2b (diff) | |
parent | 22cab65018487b1ea1838c48c7b6bae768a85e7e (diff) | |
download | platform_external_arm-trusted-firmware-0efb83e1cd72afdab36fce92dd1c508020de225b.tar.gz platform_external_arm-trusted-firmware-0efb83e1cd72afdab36fce92dd1c508020de225b.tar.bz2 platform_external_arm-trusted-firmware-0efb83e1cd72afdab36fce92dd1c508020de225b.zip |
Merge "Fix white space errors + remove #if defined" into integration
Diffstat (limited to 'lib')
-rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index c9bb005e3..faf53a848 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -21,9 +21,7 @@ #error "Neoverse-N1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" #endif -#if ERRATA_N1_IC_TRAP .global neoverse_n1_errata_ic_trap_handler -#endif /* -------------------------------------------------- * Errata Workaround for Neoverse N1 Erratum 1043202. @@ -356,7 +354,7 @@ func errata_n1_1542419_wa bl check_errata_1542419 cbz x0, 1f - /* Apply instruction patching sequence */ + /* Apply instruction patching sequence */ ldr x0, =0x0 msr CPUPSELR_EL3, x0 ldr x0, =0xEE670D35 @@ -536,10 +534,10 @@ func neoverse_n1_errata_ic_trap_handler tlbi vae3is, xzr dsb sy - # Skip the IC instruction itself - mrs x3, elr_el3 - add x3, x3, #4 - msr elr_el3, x3 + # Skip the IC instruction itself + mrs x3, elr_el3 + add x3, x3, #4 + msr elr_el3, x3 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0] ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2] |