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| author | Varun Wadekar <vwadekar@nvidia.com> | 2017-07-10 16:02:05 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-07-31 11:41:17 -0700 |
| commit | 1862d6203cb21d1846388e8d7530612a9b98786e (patch) | |
| tree | 3615e2c96baeec9fd803bbe9d97af4c95bb5c727 /lib/psci/psci_suspend.c | |
| parent | e43ae8e9de9b485f539b9c2bc8bef6680a060c26 (diff) | |
| download | platform_external_arm-trusted-firmware-1862d6203cb21d1846388e8d7530612a9b98786e.tar.gz platform_external_arm-trusted-firmware-1862d6203cb21d1846388e8d7530612a9b98786e.tar.bz2 platform_external_arm-trusted-firmware-1862d6203cb21d1846388e8d7530612a9b98786e.zip | |
lib: psci: early suspend handler for platforms
This patch adds an early suspend handler, that executes with
SMP and data cache enabled. This handler allows platforms to
perform any early actions during the CPU suspend entry sequence.
This handler is optional and platforms can choose to implement it
depending on their needs. The `pwr_domain_suspend` handler still
exists and platforms can keep on using it without any side effects.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'lib/psci/psci_suspend.c')
| -rw-r--r-- | lib/psci/psci_suspend.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/psci/psci_suspend.c b/lib/psci/psci_suspend.c index 0d1589ee0..40ecdeea9 100644 --- a/lib/psci/psci_suspend.c +++ b/lib/psci/psci_suspend.c @@ -80,6 +80,17 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl, if (psci_spd_pm && psci_spd_pm->svc_suspend) psci_spd_pm->svc_suspend(max_off_lvl); +#if !HW_ASSISTED_COHERENCY + /* + * Plat. management: Allow the platform to perform any early + * actions required to power down the CPU. This might be useful for + * HW_ASSISTED_COHERENCY = 0 platforms that can safely perform these + * actions with data caches enabled. + */ + if (psci_plat_pm_ops->pwr_domain_suspend_pwrdown_early) + psci_plat_pm_ops->pwr_domain_suspend_pwrdown_early(state_info); +#endif + /* * Store the re-entry information for the non-secure world. */ |