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authorDimitris Papastamos <dimitris.papastamos@arm.com>2018-05-29 09:28:05 +0100
committerGitHub <noreply@github.com>2018-05-29 09:28:05 +0100
commitd003b190938fa9e50ad351015da4b5225c78ce14 (patch)
tree5e86125cccb3626e81b56e7d0fd4f54517568dc9 /lib/el3_runtime
parentedcd266e6a9276ac0b2927301c8deec3798a6b1c (diff)
parentfe007b2e15ec7b569c07fedbd9bfccb5ed742eec (diff)
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Merge pull request #1392 from dp-arm/dp/cve_2018_3639
Implement workaround for CVE-2018-3639 on Cortex A57/A72/A73 and A75
Diffstat (limited to 'lib/el3_runtime')
-rw-r--r--lib/el3_runtime/aarch64/context.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 121ca4d30..707e6dbd4 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -404,6 +404,15 @@ func el3_exit
msr spsr_el3, x16
msr elr_el3, x17
+#if IMAGE_BL31 && DYNAMIC_WORKAROUND_CVE_2018_3639
+ /* Restore mitigation state as it was on entry to EL3 */
+ ldr x17, [sp, #CTX_CVE_2018_3639_OFFSET + CTX_CVE_2018_3639_DISABLE]
+ cmp x17, xzr
+ beq 1f
+ blr x17
+#endif
+
+1:
/* Restore saved general purpose registers and return */
b restore_gp_registers_eret
endfunc el3_exit