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| author | Joel Hutton <Joel.Hutton@Arm.com> | 2018-05-04 15:09:47 +0100 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-07-11 13:26:48 +0100 |
| commit | c84b6cb1aa9aed07899f15dd736fde48b6b20961 (patch) | |
| tree | b2150836f118520d7e5e5de38daca10de2431263 /lib/cpus | |
| parent | 6cbf17d11404319d79981b8566c15407cb86eefa (diff) | |
| download | platform_external_arm-trusted-firmware-c84b6cb1aa9aed07899f15dd736fde48b6b20961.tar.gz platform_external_arm-trusted-firmware-c84b6cb1aa9aed07899f15dd736fde48b6b20961.tar.bz2 platform_external_arm-trusted-firmware-c84b6cb1aa9aed07899f15dd736fde48b6b20961.zip | |
Add initial CPU support for Cortex-Deimos
Change-Id: I2c4b06423fcd96af9351b88a5e2818059f981f1b
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'lib/cpus')
| -rw-r--r-- | lib/cpus/aarch64/cortex_deimos.S | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_deimos.S b/lib/cpus/aarch64/cortex_deimos.S new file mode 100644 index 000000000..aec62a287 --- /dev/null +++ b/lib/cpus/aarch64/cortex_deimos.S @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <arch.h> +#include <asm_macros.S> +#include <bl_common.h> +#include <cortex_deimos.h> +#include <cpu_macros.S> +#include <plat_macros.S> + + /* --------------------------------------------- + * HW will do the cache maintenance while powering down + * --------------------------------------------- + */ +func cortex_deimos_core_pwr_dwn + /* --------------------------------------------- + * Enable CPU power down bit in power control register + * --------------------------------------------- + */ + mrs x0, CORTEX_DEIMOS_CPUPWRCTLR_EL1 + orr x0, x0, #CORTEX_DEIMOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT + msr CORTEX_DEIMOS_CPUPWRCTLR_EL1, x0 + isb + ret +endfunc cortex_deimos_core_pwr_dwn + + /* --------------------------------------------- + * This function provides Cortex-Deimos specific + * register information for crash reporting. + * It needs to return with x6 pointing to + * a list of register names in ascii and + * x8 - x15 having values of registers to be + * reported. + * --------------------------------------------- + */ +.section .rodata.cortex_deimos_regs, "aS" +cortex_deimos_regs: /* The ascii list of register names to be reported */ + .asciz "cpuectlr_el1", "" + +func cortex_deimos_cpu_reg_dump + adr x6, cortex_deimos_regs + mrs x8, CORTEX_DEIMOS_CPUECTLR_EL1 + ret +endfunc cortex_deimos_cpu_reg_dump + +declare_cpu_ops cortex_deimos, CORTEX_DEIMOS_MIDR, \ + CPU_NO_RESET_FUNC, \ + cortex_deimos_core_pwr_dwn |