aboutsummaryrefslogtreecommitdiffstats
path: root/lib/coreboot
diff options
context:
space:
mode:
authorAlistair Delva <adelva@google.com>2021-02-16 21:01:22 +0000
committerAutomerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>2021-02-16 21:01:22 +0000
commitefb2826bb8160e2d8e0fcec85133a7468484f9fd (patch)
tree37a21c69306801ee7cdda5167a30896c8740155b /lib/coreboot
parentb00a71fc312c9781fa6f404dccfb55b062b2ccac (diff)
parentfaa476c0caaa598afa5a6109d17102db5fe35ec6 (diff)
downloadplatform_external_arm-trusted-firmware-master.tar.gz
platform_external_arm-trusted-firmware-master.tar.bz2
platform_external_arm-trusted-firmware-master.zip
Original change: https://android-review.googlesource.com/c/platform/external/arm-trusted-firmware/+/1589611 MUST ONLY BE SUBMITTED BY AUTOMERGER Change-Id: I3a25534ceed4f8e188510641080d8b8ed49b8f62
Diffstat (limited to 'lib/coreboot')
-rw-r--r--lib/coreboot/coreboot_table.c36
1 files changed, 34 insertions, 2 deletions
diff --git a/lib/coreboot/coreboot_table.c b/lib/coreboot/coreboot_table.c
index 63bdc6359..fb31ef1e0 100644
--- a/lib/coreboot/coreboot_table.c
+++ b/lib/coreboot/coreboot_table.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -29,6 +29,7 @@ typedef struct {
} cb_header_t;
typedef enum {
+ CB_TAG_MEMORY = 0x1,
CB_TAG_SERIAL = 0xf,
CB_TAG_CBMEM_CONSOLE = 0x17,
} cb_tag_t;
@@ -37,11 +38,13 @@ typedef struct {
uint32_t tag;
uint32_t size;
union {
+ coreboot_memrange_t memranges[COREBOOT_MAX_MEMRANGES];
coreboot_serial_t serial;
uint64_t uint64;
};
} cb_entry_t;
+coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
coreboot_serial_t coreboot_serial;
/*
@@ -75,7 +78,7 @@ static void expand_and_mmap(uintptr_t baseaddr, size_t size)
static void setup_cbmem_console(uintptr_t baseaddr)
{
static console_cbmc_t console;
- assert(!console.base); /* should only have one CBMEM console */
+ assert(!console.console.base); /* should only have one CBMEM console */
/* CBMEM console structure stores its size in first header field. */
uint32_t size = *(uint32_t *)baseaddr;
@@ -86,6 +89,25 @@ static void setup_cbmem_console(uintptr_t baseaddr)
CONSOLE_FLAG_CRASH);
}
+coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size)
+{
+ int i;
+
+ for (i = 0; i < COREBOOT_MAX_MEMRANGES; i++) {
+ coreboot_memrange_t *range = &coreboot_memranges[i];
+
+ if (range->type == CB_MEM_NONE)
+ break; /* end of table reached */
+ if ((start >= range->start) &&
+ (start - range->start < range->size) &&
+ (size <= range->size - (start - range->start))) {
+ return range->type;
+ }
+ }
+
+ return CB_MEM_NONE;
+}
+
void coreboot_table_setup(void *base)
{
cb_header_t *header = base;
@@ -99,6 +121,7 @@ void coreboot_table_setup(void *base)
ptr = base + header->header_bytes;
for (i = 0; i < header->table_entries; i++) {
+ size_t size;
cb_entry_t *entry = ptr;
if (ptr - base >= header->header_bytes + header->table_bytes) {
@@ -107,6 +130,15 @@ void coreboot_table_setup(void *base)
}
switch (read_le32(&entry->tag)) {
+ case CB_TAG_MEMORY:
+ size = read_le32(&entry->size) -
+ offsetof(cb_entry_t, memranges);
+ if (size > sizeof(coreboot_memranges)) {
+ ERROR("Need to truncate coreboot memranges!\n");
+ size = sizeof(coreboot_memranges);
+ }
+ memcpy(&coreboot_memranges, &entry->memranges, size);
+ break;
case CB_TAG_SERIAL:
memcpy(&coreboot_serial, &entry->serial,
sizeof(coreboot_serial));