diff options
author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2020-03-19 11:09:37 +0000 |
---|---|---|
committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-03-19 11:09:37 +0000 |
commit | f097fb70c311ba0b7eaee2101afa396981c2c534 (patch) | |
tree | 62c6d8ea8b21a8c8e96c41ae8f7ec2e43da9bb1d /include | |
parent | c9796852718f66fab99f9e27d58e18fd757dbe60 (diff) | |
parent | 0ac1bf7218d5b7146a4cd9a2ec93ef1e3c7b6728 (diff) | |
download | platform_external_arm-trusted-firmware-f097fb70c311ba0b7eaee2101afa396981c2c534.tar.gz platform_external_arm-trusted-firmware-f097fb70c311ba0b7eaee2101afa396981c2c534.tar.bz2 platform_external_arm-trusted-firmware-f097fb70c311ba0b7eaee2101afa396981c2c534.zip |
Merge changes from topic "tegra-downstream-03122020" into integration
* changes:
Tegra: assembly version of the 'plat_core_pos_by_mpidr' handler
Tegra194: reset power state info for CPUs
tlkd: remove system off/reset handlers
Tegra186: system resume from TZSRAM memory
Tegra186: disable PROGRAMMABLE_RESET_ADDRESS
Tegra210: SE: switch SE clock source to CLK_M
Tegra: increase platform assert logging level to VERBOSE
spd: trusty: disable error messages seen during boot
Tegra194: enable dual execution for EL2 and EL3
Tegra: aarch64: calculate core position from one place
Tegra194: Update t194_nvg.h to v6.7
Diffstat (limited to 'include')
-rw-r--r-- | include/bl32/payloads/tlk.h | 3 | ||||
-rw-r--r-- | include/lib/cpus/aarch64/denver.h | 5 |
2 files changed, 6 insertions, 2 deletions
diff --git a/include/bl32/payloads/tlk.h b/include/bl32/payloads/tlk.h index fe6f3528b..5162d1340 100644 --- a/include/bl32/payloads/tlk.h +++ b/include/bl32/payloads/tlk.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -26,7 +27,6 @@ #define TLK_RESUME_FID TLK_TOS_YIELD_FID(0x100) #define TLK_SYSTEM_SUSPEND TLK_TOS_YIELD_FID(0xE001) #define TLK_SYSTEM_RESUME TLK_TOS_YIELD_FID(0xE002) -#define TLK_SYSTEM_OFF TLK_TOS_YIELD_FID(0xE003) #define TLK_IRQ_FIRED TLK_TOS_YIELD_FID(0xE004) /* @@ -39,7 +39,6 @@ #define TLK_VA_TRANSLATE (0x32000004 | (ULL(1) << 31)) #define TLK_SUSPEND_DONE (0x32000005 | (ULL(1) << 31)) #define TLK_RESUME_DONE (0x32000006 | (ULL(1) << 31)) -#define TLK_SYSTEM_OFF_DONE (0x32000007 | (ULL(1) << 31)) #define TLK_IRQ_DONE (0x32000008 | (ULL(1) << 31)) /* diff --git a/include/lib/cpus/aarch64/denver.h b/include/lib/cpus/aarch64/denver.h index 02657a0fb..b98abdf4d 100644 --- a/include/lib/cpus/aarch64/denver.h +++ b/include/lib/cpus/aarch64/denver.h @@ -34,6 +34,11 @@ #define DENVER_CPU_PMSTATE_C7 U(0x7) #define DENVER_CPU_PMSTATE_MASK U(0xF) +/* ACTRL_ELx bits to enable dual execution*/ +#define DENVER_CPU_ENABLE_DUAL_EXEC_EL2 (ULL(1) << 9) +#define DENVER_CPU_ENABLE_DUAL_EXEC_EL3 (ULL(1) << 9) +#define DENVER_CPU_ENABLE_DUAL_EXEC_EL1 (U(1) << 4) + #ifndef __ASSEMBLER__ /* Disable Dynamic Code Optimisation */ |