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authorLouis Mayencourt <louis.mayencourt@arm.com>2019-02-21 16:38:16 +0000
committerLouis Mayencourt <louis.mayencourt@arm.com>2019-02-26 13:22:56 +0000
commite6cab15dc710e2270d869c3fa76ed8d0d4943b66 (patch)
treef4dc137648e0ed0014036b34d3bec72cd5079d60 /include
parentab3d22473df279c61ed4d4873d26b072dcf887e8 (diff)
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Add workaround for errata 855423 of Cortex-A73
Broadcast maintainance operations might not be correctly synchronized between cores. Set bit 7 of S3_0_C15_C0_2 to prevent this. Change-Id: I67fb62c0b458d44320ebaedafcb8495ff26c814b Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'include')
-rw-r--r--include/lib/cpus/aarch64/cortex_a73.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a73.h b/include/lib/cpus/aarch64/cortex_a73.h
index 3b401805a..61b2b737b 100644
--- a/include/lib/cpus/aarch64/cortex_a73.h
+++ b/include/lib/cpus/aarch64/cortex_a73.h
@@ -31,4 +31,6 @@
#define CORTEX_A73_IMP_DEF_REG1_DISABLE_LOAD_PASS_STORE (ULL(1) << 3)
+#define CORTEX_A73_IMP_DEF_REG2 S3_0_C15_C0_2
+
#endif /* CORTEX_A73_H */