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| author | Remi Pommarel <repk@triplefau.lt> | 2019-03-28 23:34:18 +0100 |
|---|---|---|
| committer | Remi Pommarel <repk@triplefau.lt> | 2019-04-02 16:33:59 +0200 |
| commit | b99f9224edec2339ebc9eaf320a80a6885ae0f3e (patch) | |
| tree | 783551db4cee7cfd4a39ebec07ce84352ecdae89 /include | |
| parent | 95d0d13ce2095d821662a624faf1ac4e5a13f928 (diff) | |
| download | platform_external_arm-trusted-firmware-b99f9224edec2339ebc9eaf320a80a6885ae0f3e.tar.gz platform_external_arm-trusted-firmware-b99f9224edec2339ebc9eaf320a80a6885ae0f3e.tar.bz2 platform_external_arm-trusted-firmware-b99f9224edec2339ebc9eaf320a80a6885ae0f3e.zip | |
meson/gxl: Add support for SHA256 DMA engine
In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Diffstat (limited to 'include')
| -rw-r--r-- | include/drivers/meson/gxl/crypto/sha_dma.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/include/drivers/meson/gxl/crypto/sha_dma.h b/include/drivers/meson/gxl/crypto/sha_dma.h new file mode 100644 index 000000000..52129a61f --- /dev/null +++ b/include/drivers/meson/gxl/crypto/sha_dma.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2019, Remi Pommarel <repk@triplefau.lt> + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef SHA_DMA_H +#define SHA_DMA_H + +#define SHA256_HASHSZ 32 +#define SHA256_BLOCKSZ 0x40 + +enum ASD_MODE { + ASM_INVAL, + ASM_SHA256, + ASM_SHA224, +}; + +struct asd_ctx { + uint8_t digest[SHA256_HASHSZ]; + uint8_t block[SHA256_BLOCKSZ]; + size_t blocksz; + enum ASD_MODE mode; + uint8_t started; +}; + +static inline void asd_sha_init(struct asd_ctx *ctx, enum ASD_MODE mode) +{ + ctx->started = 0; + ctx->mode = mode; + ctx->blocksz = 0; +} + +void asd_sha_update(struct asd_ctx *ctx, void *data, size_t len); +void asd_sha_finalize(struct asd_ctx *ctx); + +#endif |