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authorMark Dykes <mardyk01@review.trustedfirmware.org>2020-03-11 15:38:45 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-03-11 15:38:45 +0000
commit6654d17e1a135e4dcbd1995a4d369a6314c361b5 (patch)
treef8bee1b33979b1f30edcee398a0e3e15dd15fa15 /include
parent9f41b0b153ec0b7345bdeb67a4e56222b306b3ab (diff)
parent6e19bd563db0bca61c4d05f2e4ffd5110ca3b0a2 (diff)
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Merge "TF-A GICv3 driver: Separate GICD and GICR accessor functions" into integration
Diffstat (limited to 'include')
-rw-r--r--include/drivers/arm/gicv3.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index c4f42d04d..e6339bcfe 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -32,7 +32,7 @@
#define GICD_SETSPI_NSR U(0x40)
#define GICD_CLRSPI_NSR U(0x48)
#define GICD_SETSPI_SR U(0x50)
-#define GICD_CLRSPI_SR U(0x50)
+#define GICD_CLRSPI_SR U(0x58)
#define GICD_IGRPMODR U(0xd00)
/*
* GICD_IROUTER<n> register is at 0x6000 + 8n, where n is the interrupt id and
@@ -79,7 +79,7 @@
#define NUM_OF_DIST_REGS 30
/*******************************************************************************
- * GICv3 Re-distributor interface registers & constants
+ * GICv3 Redistributor interface registers & constants
******************************************************************************/
#define GICR_PCPUBASE_SHIFT 0x11
#define GICR_SGIBASE_OFFSET U(65536) /* 64 KB */