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authorPaul Beesley <paul.beesley@arm.com>2019-11-12 17:00:13 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-11-12 17:00:13 +0000
commit63b96271909dd3ae9544128bd6d3b74c66e11c2b (patch)
tree23c95665b885d9a00a1d7d99ba3a8f076f0babf3 /include
parent87d35d933db1a6766ab34b16915b90aee5764ccb (diff)
parent133a5c680243a282b78b94834e5f09cb17100866 (diff)
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Merge "plat/arm: Re-enable PIE when RESET_TO_BL31=1" into integration
Diffstat (limited to 'include')
-rw-r--r--include/plat/arm/common/arm_def.h13
1 files changed, 4 insertions, 9 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 53bd13fc0..941190fdc 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -403,21 +403,16 @@
#define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \
PLAT_ARM_MAX_BL31_SIZE)
#elif (RESET_TO_BL31)
-
-# if ENABLE_PIE
+/* Ensure Position Independent support (PIE) is enabled for this config.*/
+# if !ENABLE_PIE
+# error "BL31 must be a PIE if RESET_TO_BL31=1."
+#endif
/*
* Since this is PIE, we can define BL31_BASE to 0x0 since this macro is solely
* used for building BL31 and not used for loading BL31.
*/
# define BL31_BASE 0x0
# define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE
-# else
-/* Put BL31_BASE in the middle of the Trusted SRAM.*/
-# define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \
- (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1))
-# define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
-# endif /* ENABLE_PIE */
-
#else
/* Put BL31 below BL2 in the Trusted SRAM.*/
#define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\