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| author | Manish Pandey <manish.pandey2@arm.com> | 2020-06-16 09:55:36 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-06-16 09:55:36 +0000 |
| commit | 5eeb091ade2f6a51f2e34aa9e62830afdc032aa1 (patch) | |
| tree | 002cf914ba8e28f4926a3cea58d1322931e12bb1 /include | |
| parent | 83d1e8e75b45fe70d30b0c41edb006875ed0c6fa (diff) | |
| parent | fba5cdc69569a5b62cbd4303b91bb2d41d335566 (diff) | |
| download | platform_external_arm-trusted-firmware-5eeb091ade2f6a51f2e34aa9e62830afdc032aa1.tar.gz platform_external_arm-trusted-firmware-5eeb091ade2f6a51f2e34aa9e62830afdc032aa1.tar.bz2 platform_external_arm-trusted-firmware-5eeb091ade2f6a51f2e34aa9e62830afdc032aa1.zip | |
Merge changes from topic "tegra194-ras-handling" into integration
* changes:
Tegra194: ras: verbose prints for SErrors
Prevent RAS register access from lower ELs
Tegra194: SiP: clear RAS corrected error records
Tegra194: add RAS exception handling
Diffstat (limited to 'include')
| -rw-r--r-- | include/arch/aarch64/arch.h | 1 | ||||
| -rw-r--r-- | include/lib/extensions/ras.h | 2 | ||||
| -rw-r--r-- | include/lib/extensions/ras_arch.h | 4 |
3 files changed, 7 insertions, 0 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index 10fe926ea..90569c3cf 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -342,6 +342,7 @@ #define SCR_EEL2_BIT (U(1) << 18) #define SCR_API_BIT (U(1) << 17) #define SCR_APK_BIT (U(1) << 16) +#define SCR_TERR_BIT (U(1) << 15) #define SCR_TWE_BIT (U(1) << 13) #define SCR_TWI_BIT (U(1) << 12) #define SCR_ST_BIT (U(1) << 11) diff --git a/include/lib/extensions/ras.h b/include/lib/extensions/ras.h index 4fc8f04b1..793ab9fac 100644 --- a/include/lib/extensions/ras.h +++ b/include/lib/extensions/ras.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -192,6 +193,7 @@ static inline int ras_err_ser_probe_sysreg(const struct err_record_info *info, probe_data); } +const char *ras_serr_to_str(unsigned int serr); int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie, void *handle, uint64_t flags); void ras_init(void); diff --git a/include/lib/extensions/ras_arch.h b/include/lib/extensions/ras_arch.h index 0c98c4a0e..55760b06b 100644 --- a/include/lib/extensions/ras_arch.h +++ b/include/lib/extensions/ras_arch.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -151,6 +152,9 @@ #define ERROR_STATUS_SET_UC 0x2 /* Uncontainable */ #define ERROR_STATUS_SET_CE 0x3 /* Corrected */ +/* Number of architecturally-defined primary error codes */ +#define ERROR_STATUS_NUM_SERR U(22) + /* Implementation Defined Syndrome bit in ESR */ #define SERROR_IDS_BIT U(24) |