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authorBenjamin Fair <b-fair@ti.com>2016-10-14 01:13:33 +0000
committerAndrew F. Davis <afd@ti.com>2018-06-11 14:26:32 -0500
commit529b541e8b81f68bb6ee3c6ecdb43b5cbe0a9d70 (patch)
treecadc10f646fc59c247530c65dd45ff78088d8e6a /include
parent11bebd7cab0873d04ad8f1d3ccd538f4d5b80ccb (diff)
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drivers: ti: uart: Add TI specific 16550 initialization
On TI platforms the UART is disabled by default and must be explicitly enabled using the MDR1 register. NOTE: The original definition of http://www.ti.com/lit/ds/symlink/pc16550d.pdf has no MDR register, but many TI SoCs implementing 16550 do have a quirky MDR register implemented. So, this should be enabled with TI_16550_MDR_QUIRK NOTE: In such implementation, the CSR register does not exist. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
Diffstat (limited to 'include')
-rw-r--r--include/drivers/ti/uart/uart_16550.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drivers/ti/uart/uart_16550.h b/include/drivers/ti/uart/uart_16550.h
index 9eba41aa6..b00f66421 100644
--- a/include/drivers/ti/uart/uart_16550.h
+++ b/include/drivers/ti/uart/uart_16550.h
@@ -23,6 +23,8 @@
#define UARTMSR 0x18
#define UARTSPR 0x1c
#define UARTCSR 0x20
+/* Some instances have MDR1 defined as well */
+#define UARTMDR1 0x20
#define UARTRXFIFOCFG 0x24
#define UARTMIE 0x28
#define UARTVNDR 0x2c