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| author | Antonio Niño Díaz <antonio.ninodiaz@arm.com> | 2018-10-24 11:29:57 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-24 11:29:57 +0200 |
| commit | 44445ae5d86f820c3764fdfac0a109f315ebb54f (patch) | |
| tree | 11bf7c45ce59d0dcfdd108c1fe2a5e3e3080d433 /include | |
| parent | 414c9e6d86e80ef29b6fc8797df8aa1f4e1ea9c6 (diff) | |
| parent | 3ff4aaaca44b75504aec5ab5b72cd587a6fcd432 (diff) | |
| download | platform_external_arm-trusted-firmware-44445ae5d86f820c3764fdfac0a109f315ebb54f.tar.gz platform_external_arm-trusted-firmware-44445ae5d86f820c3764fdfac0a109f315ebb54f.tar.bz2 platform_external_arm-trusted-firmware-44445ae5d86f820c3764fdfac0a109f315ebb54f.zip | |
Merge pull request #1641 from jeenu-arm/ptrauth
AArch64: Enable lower ELs to use pointer authentication
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/aarch64/el3_common_macros.S | 7 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 4 |
2 files changed, 10 insertions, 1 deletions
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index 03b977e36..143c70c39 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -70,9 +70,14 @@ * * SCR_EL3.EA: Set to one to route External Aborts and SError Interrupts * to EL3 when executing at any EL. + * + * SCR_EL3.{API,APK}: For Armv8.3 pointer authentication feature, + * disable traps to EL3 when accessing key registers or using pointer + * authentication instructions from lower ELs. * --------------------------------------------------------------------- */ - mov x0, #((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT) \ + mov_imm x0, ((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT | \ + SCR_API_BIT | SCR_APK_BIT) \ & ~(SCR_TWE_BIT | SCR_TWI_BIT | SCR_SMD_BIT)) msr scr_el3, x0 diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a6022cb01..e6842e148 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -218,6 +218,8 @@ /* SCR definitions */ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_FIEN_BIT (U(1) << 21) +#define SCR_API_BIT (U(1) << 17) +#define SCR_APK_BIT (U(1) << 16) #define SCR_TWE_BIT (U(1) << 13) #define SCR_TWI_BIT (U(1) << 12) #define SCR_ST_BIT (U(1) << 11) @@ -274,6 +276,8 @@ #define VTTBR_BADDR_SHIFT U(0) /* HCR definitions */ +#define HCR_API_BIT (ULL(1) << 41) +#define HCR_APK_BIT (ULL(1) << 40) #define HCR_RW_SHIFT U(31) #define HCR_RW_BIT (ULL(1) << HCR_RW_SHIFT) #define HCR_AMO_BIT (ULL(1) << 5) |