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author | Soby Mathew <soby.mathew@arm.com> | 2018-10-02 10:12:32 +0100 |
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committer | GitHub <noreply@github.com> | 2018-10-02 10:12:32 +0100 |
commit | 3ccfcd6e3dbc742ff15ead72d432427a38de650c (patch) | |
tree | 89dd07f10f24d0ac19e2f02c0d2470e6309a9e42 /include | |
parent | 9a983cfec21dea9347e191434ee704c57a55bda1 (diff) | |
parent | 991f1f4d94560adec7f4679339b3e6b4916d6896 (diff) | |
download | platform_external_arm-trusted-firmware-3ccfcd6e3dbc742ff15ead72d432427a38de650c.tar.gz platform_external_arm-trusted-firmware-3ccfcd6e3dbc742ff15ead72d432427a38de650c.tar.bz2 platform_external_arm-trusted-firmware-3ccfcd6e3dbc742ff15ead72d432427a38de650c.zip |
Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated
Remove deprecated interfaces for all platforms
Diffstat (limited to 'include')
39 files changed, 13 insertions, 1062 deletions
diff --git a/include/bl32/sp_min/platform_sp_min.h b/include/bl32/sp_min/platform_sp_min.h index 8f6a82d90..2d71a4798 100644 --- a/include/bl32/sp_min/platform_sp_min.h +++ b/include/bl32/sp_min/platform_sp_min.h @@ -10,10 +10,6 @@ /******************************************************************************* * Mandatory SP_MIN functions ******************************************************************************/ -#if !ERROR_DEPRECATED -void sp_min_early_platform_setup(void *from_bl2, - void *plat_params_from_bl2); -#endif void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3); void sp_min_platform_setup(void); diff --git a/include/common/aarch64/asm_macros.S b/include/common/aarch64/asm_macros.S index 6e66ea99e..9621a1c02 100644 --- a/include/common/aarch64/asm_macros.S +++ b/include/common/aarch64/asm_macros.S @@ -98,36 +98,6 @@ .endm /* - * This macro verifies that the given vector doesn't exceed the - * architectural limit of 32 instructions. This is meant to be placed - * immediately after the last instruction in the vector. It takes the - * vector entry as the parameter - */ - .macro check_vector_size since -#if ERROR_DEPRECATED - .error "check_vector_size must not be used. Use end_vector_entry instead" -#endif - end_vector_entry \since - .endm - -#if ENABLE_PLAT_COMPAT - /* - * This macro calculates the base address of an MP stack using the - * platform_get_core_pos() index, the name of the stack storage and - * the size of each stack - * In: X0 = MPIDR of CPU whose stack is wanted - * Out: X0 = physical address of stack base - * Clobber: X30, X1, X2 - */ - .macro get_mp_stack _name, _size - bl platform_get_core_pos - ldr x2, =(\_name + \_size) - mov x1, #\_size - madd x0, x0, x1, x2 - .endm -#endif - - /* * This macro calculates the base address of the current CPU's MP stack * using the plat_my_core_pos() index, the name of the stack storage * and the size of each stack diff --git a/include/common/bl_common.h b/include/common/bl_common.h index 6478f12fc..bfe1d8c83 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -107,10 +107,6 @@ IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL_COHERENT_RAM_END); typedef struct meminfo { uintptr_t total_base; size_t total_size; -#if !LOAD_IMAGE_V2 - uintptr_t free_base; - size_t free_size; -#endif } meminfo_t; /***************************************************************************** @@ -124,9 +120,7 @@ typedef struct image_info { param_header_t h; uintptr_t image_base; /* physical address of base of image */ uint32_t image_size; /* bytes read from image file */ -#if LOAD_IMAGE_V2 uint32_t image_max_size; -#endif } image_info_t; /***************************************************************************** @@ -145,7 +139,6 @@ typedef struct image_desc { entry_point_info_t ep_info; } image_desc_t; -#if LOAD_IMAGE_V2 /* BL image node in the BL image loading sequence */ typedef struct bl_load_info_node { unsigned int image_id; @@ -176,33 +169,6 @@ typedef struct bl_params { bl_params_node_t *head; } bl_params_t; -#else /* LOAD_IMAGE_V2 */ - -/******************************************************************************* - * This structure represents the superset of information that can be passed to - * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be - * populated only if BL2 detects its presence. A pointer to a structure of this - * type should be passed in X0 to BL31's cold boot entrypoint. - * - * Use of this structure and the X0 parameter is not mandatory: the BL31 - * platform code can use other mechanisms to provide the necessary information - * about BL32 and BL33 to the common and SPD code. - * - * BL31 image information is mandatory if this structure is used. If either of - * the optional BL32 and BL33 image information is not provided, this is - * indicated by the respective image_info pointers being zero. - ******************************************************************************/ -typedef struct bl31_params { - param_header_t h; - image_info_t *bl31_image_info; - entry_point_info_t *bl32_ep_info; - image_info_t *bl32_image_info; - entry_point_info_t *bl33_ep_info; - image_info_t *bl33_image_info; -} bl31_params_t; - -#endif /* LOAD_IMAGE_V2 */ - /******************************************************************************* * Function & variable prototypes ******************************************************************************/ @@ -211,27 +177,8 @@ size_t get_image_size(unsigned int image_id); int is_mem_free(uintptr_t free_base, size_t free_size, uintptr_t addr, size_t size); -#if LOAD_IMAGE_V2 - int load_auth_image(unsigned int image_id, image_info_t *image_data); -#else - -int load_image(meminfo_t *mem_layout, - unsigned int image_id, - uintptr_t image_base, - image_info_t *image_data, - entry_point_info_t *entry_point_info); -int load_auth_image(meminfo_t *mem_layout, - unsigned int image_id, - uintptr_t image_base, - image_info_t *image_data, - entry_point_info_t *entry_point_info); -void reserve_mem(uintptr_t *free_base, size_t *free_size, - uintptr_t addr, size_t size); - -#endif /* LOAD_IMAGE_V2 */ - #if TRUSTED_BOARD_BOOT && defined(DYN_DISABLE_AUTH) /* * API to dynamically disable authentication. Only meant for development diff --git a/include/common/desc_image_load.h b/include/common/desc_image_load.h index 73aa27cca..1ed2b15de 100644 --- a/include/common/desc_image_load.h +++ b/include/common/desc_image_load.h @@ -8,7 +8,6 @@ #include <bl_common.h> -#if LOAD_IMAGE_V2 /* Following structure is used to store BL ep/image info. */ typedef struct bl_mem_params_node { unsigned int image_id; @@ -38,5 +37,4 @@ bl_load_info_t *get_bl_load_info_from_mem_params_desc(void); bl_params_t *get_next_bl_params_from_mem_params_desc(void); void populate_next_bl_params_config(bl_params_t *bl2_to_next_bl_params); -#endif /* LOAD_IMAGE_V2 */ #endif /* __DESC_IMAGE_LOAD_H__ */ diff --git a/include/drivers/arm/arm_gic.h b/include/drivers/arm/arm_gic.h deleted file mode 100644 index 8d2a23228..000000000 --- a/include/drivers/arm/arm_gic.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __ARM_GIC_H__ -#define __ARM_GIC_H__ - -#include <cdefs.h> -#include <stdint.h> - -/******************************************************************************* - * Function declarations - ******************************************************************************/ -void arm_gic_init(uintptr_t gicc_base, - uintptr_t gicd_base, - uintptr_t gicr_base, - const unsigned int *irq_sec_ptr, - unsigned int num_irqs) __deprecated; -void arm_gic_setup(void) __deprecated; -void arm_gic_cpuif_deactivate(void) __deprecated; -void arm_gic_cpuif_setup(void) __deprecated; -void arm_gic_pcpu_distif_setup(void) __deprecated; - -uint32_t arm_gic_interrupt_type_to_line(uint32_t type, - uint32_t security_state) __deprecated; -uint32_t arm_gic_get_pending_interrupt_type(void) __deprecated; -uint32_t arm_gic_get_pending_interrupt_id(void) __deprecated; -uint32_t arm_gic_acknowledge_interrupt(void) __deprecated; -void arm_gic_end_of_interrupt(uint32_t id) __deprecated; -uint32_t arm_gic_get_interrupt_type(uint32_t id) __deprecated; - -#endif /* __GIC_H__ */ diff --git a/include/drivers/arm/cci400.h b/include/drivers/arm/cci400.h deleted file mode 100644 index e11dad45d..000000000 --- a/include/drivers/arm/cci400.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __CCI_400_H__ -#define __CCI_400_H__ - -/************************************************************** - * THIS DRIVER IS DEPRECATED. Please use the driver in cci.h - **************************************************************/ -#if ERROR_DEPRECATED -#error " The CCI-400 specific driver is deprecated." -#endif - - -/* Slave interface offsets from PERIPHBASE */ -#define SLAVE_IFACE4_OFFSET 0x5000 -#define SLAVE_IFACE3_OFFSET 0x4000 -#define SLAVE_IFACE2_OFFSET 0x3000 -#define SLAVE_IFACE1_OFFSET 0x2000 -#define SLAVE_IFACE0_OFFSET 0x1000 -#define SLAVE_IFACE_OFFSET(index) SLAVE_IFACE0_OFFSET + \ - (0x1000 * (index)) - -/* Control and ID register offsets */ -#define CTRL_OVERRIDE_REG 0x0 -#define SPEC_CTRL_REG 0x4 -#define SECURE_ACCESS_REG 0x8 -#define STATUS_REG 0xc -#define IMPRECISE_ERR_REG 0x10 -#define PERFMON_CTRL_REG 0x100 - -/* Slave interface register offsets */ -#define SNOOP_CTRL_REG 0x0 -#define SH_OVERRIDE_REG 0x4 -#define READ_CHNL_QOS_VAL_OVERRIDE_REG 0x100 -#define WRITE_CHNL_QOS_VAL_OVERRIDE_REG 0x104 -#define QOS_CTRL_REG 0x10c -#define MAX_OT_REG 0x110 -#define TARGET_LATENCY_REG 0x130 -#define LATENCY_REGULATION_REG 0x134 -#define QOS_RANGE_REG 0x138 - -/* Snoop Control register bit definitions */ -#define DVM_EN_BIT (1 << 1) -#define SNOOP_EN_BIT (1 << 0) - -/* Status register bit definitions */ -#define CHANGE_PENDING_BIT (1 << 0) - -#ifndef __ASSEMBLY__ - -#include <stdint.h> - -/* Function declarations */ - -/* - * The CCI-400 driver must be initialized with the base address of the - * CCI-400 device in the platform memory map, and the cluster indices for - * the CCI-400 slave interfaces 3 and 4 respectively. These are the fully - * coherent ACE slave interfaces of CCI-400. - * The cluster indices must either be 0 or 1, corresponding to the level 1 - * affinity instance of the mpidr representing the cluster. A negative cluster - * index indicates that no cluster is present on that slave interface. - */ -void cci_init(uintptr_t cci_base, - int slave_iface3_cluster_ix, - int slave_iface4_cluster_ix) __deprecated; - -void cci_enable_cluster_coherency(unsigned long mpidr) __deprecated; -void cci_disable_cluster_coherency(unsigned long mpidr) __deprecated; - -#endif /* __ASSEMBLY__ */ -#endif /* __CCI_400_H__ */ diff --git a/include/drivers/arm/gic_v2.h b/include/drivers/arm/gic_v2.h deleted file mode 100644 index 258b89812..000000000 --- a/include/drivers/arm/gic_v2.h +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __GIC_V2_H__ -#define __GIC_V2_H__ - -/* The macros required here are additional to those in gic_common.h. */ -#include <gic_common.h> - -/****************************************************************************** - * THIS DRIVER IS DEPRECATED. For GICv2 systems, use the driver in gicv2.h - * and for GICv3 systems, use the driver in gicv3.h. - *****************************************************************************/ -#if ERROR_DEPRECATED -#error " The legacy ARM GIC driver is deprecated." -#endif - -#define GIC400_NUM_SPIS U(480) -#define MAX_PPIS U(14) -#define MAX_SGIS U(16) - - -#define GRP0 U(0) -#define GRP1 U(1) -#define GIC_TARGET_CPU_MASK U(0xff) - -#define ENABLE_GRP0 (U(1) << 0) -#define ENABLE_GRP1 (U(1) << 1) - -/* Distributor interface definitions */ -#define GICD_ITARGETSR U(0x800) -#define GICD_SGIR U(0xF00) -#define GICD_CPENDSGIR U(0xF10) -#define GICD_SPENDSGIR U(0xF20) - -#define CPENDSGIR_SHIFT U(2) -#define SPENDSGIR_SHIFT CPENDSGIR_SHIFT - -/* GICD_TYPER bit definitions */ -#define IT_LINES_NO_MASK U(0x1f) - -/* Physical CPU Interface registers */ -#define GICC_CTLR U(0x0) -#define GICC_PMR U(0x4) -#define GICC_BPR U(0x8) -#define GICC_IAR U(0xC) -#define GICC_EOIR U(0x10) -#define GICC_RPR U(0x14) -#define GICC_HPPIR U(0x18) -#define GICC_AHPPIR U(0x28) -#define GICC_IIDR U(0xFC) -#define GICC_DIR U(0x1000) -#define GICC_PRIODROP GICC_EOIR - -/* Common CPU Interface definitions */ -#define INT_ID_MASK U(0x3ff) - -/* GICC_CTLR bit definitions */ -#define EOI_MODE_NS (U(1) << 10) -#define EOI_MODE_S (U(1) << 9) -#define IRQ_BYP_DIS_GRP1 (U(1) << 8) -#define FIQ_BYP_DIS_GRP1 (U(1) << 7) -#define IRQ_BYP_DIS_GRP0 (U(1) << 6) -#define FIQ_BYP_DIS_GRP0 (U(1) << 5) -#define CBPR (U(1) << 4) -#define FIQ_EN (U(1) << 3) -#define ACK_CTL (U(1) << 2) - -/* GICC_IIDR bit masks and shifts */ -#define GICC_IIDR_PID_SHIFT U(20) -#define GICC_IIDR_ARCH_SHIFT U(16) -#define GICC_IIDR_REV_SHIFT U(12) -#define GICC_IIDR_IMP_SHIFT U(0) - -#define GICC_IIDR_PID_MASK U(0xfff) -#define GICC_IIDR_ARCH_MASK U(0xf) -#define GICC_IIDR_REV_MASK U(0xf) -#define GICC_IIDR_IMP_MASK U(0xfff) - -/* HYP view virtual CPU Interface registers */ -#define GICH_CTL U(0x0) -#define GICH_VTR U(0x4) -#define GICH_ELRSR0 U(0x30) -#define GICH_ELRSR1 U(0x34) -#define GICH_APR0 U(0xF0) -#define GICH_LR_BASE U(0x100) - -/* Virtual CPU Interface registers */ -#define GICV_CTL U(0x0) -#define GICV_PRIMASK U(0x4) -#define GICV_BP U(0x8) -#define GICV_INTACK U(0xC) -#define GICV_EOI U(0x10) -#define GICV_RUNNINGPRI U(0x14) -#define GICV_HIGHESTPEND U(0x18) -#define GICV_DEACTIVATE U(0x1000) - -#ifndef __ASSEMBLY__ - -#include <mmio.h> -#include <stdint.h> - -/******************************************************************************* - * GIC Distributor function prototypes - ******************************************************************************/ - -unsigned int gicd_read_igroupr(uintptr_t, unsigned int); -unsigned int gicd_read_isenabler(uintptr_t, unsigned int); -unsigned int gicd_read_icenabler(uintptr_t, unsigned int); -unsigned int gicd_read_ispendr(uintptr_t, unsigned int); -unsigned int gicd_read_icpendr(uintptr_t, unsigned int); -unsigned int gicd_read_isactiver(uintptr_t, unsigned int); -unsigned int gicd_read_icactiver(uintptr_t, unsigned int); -unsigned int gicd_read_ipriorityr(uintptr_t, unsigned int); -unsigned int gicd_read_itargetsr(uintptr_t, unsigned int); -unsigned int gicd_read_icfgr(uintptr_t, unsigned int); -unsigned int gicd_read_cpendsgir(uintptr_t, unsigned int); -unsigned int gicd_read_spendsgir(uintptr_t, unsigned int); -void gicd_write_igroupr(uintptr_t, unsigned int, unsigned int); -void gicd_write_isenabler(uintptr_t, unsigned int, unsigned int); -void gicd_write_icenabler(uintptr_t, unsigned int, unsigned int); -void gicd_write_ispendr(uintptr_t, unsigned int, unsigned int); -void gicd_write_icpendr(uintptr_t, unsigned int, unsigned int); -void gicd_write_isactiver(uintptr_t, unsigned int, unsigned int); -void gicd_write_icactiver(uintptr_t, unsigned int, unsigned int); -void gicd_write_ipriorityr(uintptr_t, unsigned int, unsigned int); -void gicd_write_itargetsr(uintptr_t, unsigned int, unsigned int); -void gicd_write_icfgr(uintptr_t, unsigned int, unsigned int); -void gicd_write_cpendsgir(uintptr_t, unsigned int, unsigned int); -void gicd_write_spendsgir(uintptr_t, unsigned int, unsigned int); -unsigned int gicd_get_igroupr(uintptr_t, unsigned int); -void gicd_set_igroupr(uintptr_t, unsigned int); -void gicd_clr_igroupr(uintptr_t, unsigned int); -void gicd_set_isenabler(uintptr_t, unsigned int); -void gicd_set_icenabler(uintptr_t, unsigned int); -void gicd_set_ispendr(uintptr_t, unsigned int); -void gicd_set_icpendr(uintptr_t, unsigned int); -void gicd_set_isactiver(uintptr_t, unsigned int); -void gicd_set_icactiver(uintptr_t, unsigned int); -void gicd_set_ipriorityr(uintptr_t, unsigned int, unsigned int); -void gicd_set_itargetsr(uintptr_t, unsigned int, unsigned int); - - -/******************************************************************************* - * GIC Distributor interface accessors for reading entire registers - ******************************************************************************/ - -static inline unsigned int gicd_read_ctlr(uintptr_t base) -{ - return mmio_read_32(base + GICD_CTLR); -} - -static inline unsigned int gicd_read_typer(uintptr_t base) -{ - return mmio_read_32(base + GICD_TYPER); -} - -static inline unsigned int gicd_read_sgir(uintptr_t base) -{ - return mmio_read_32(base + GICD_SGIR); -} - - -/******************************************************************************* - * GIC Distributor interface accessors for writing entire registers - ******************************************************************************/ - -static inline void gicd_write_ctlr(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICD_CTLR, val); -} - -static inline void gicd_write_sgir(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICD_SGIR, val); -} - - -/******************************************************************************* - * GIC CPU interface accessors for reading entire registers - ******************************************************************************/ - -static inline unsigned int gicc_read_ctlr(uintptr_t base) -{ - return mmio_read_32(base + GICC_CTLR); -} - -static inline unsigned int gicc_read_pmr(uintptr_t base) -{ - return mmio_read_32(base + GICC_PMR); -} - -static inline unsigned int gicc_read_BPR(uintptr_t base) -{ - return mmio_read_32(base + GICC_BPR); -} - -static inline unsigned int gicc_read_IAR(uintptr_t base) -{ - return mmio_read_32(base + GICC_IAR); -} - -static inline unsigned int gicc_read_EOIR(uintptr_t base) -{ - return mmio_read_32(base + GICC_EOIR); -} - -static inline unsigned int gicc_read_hppir(uintptr_t base) -{ - return mmio_read_32(base + GICC_HPPIR); -} - -static inline unsigned int gicc_read_ahppir(uintptr_t base) -{ - return mmio_read_32(base + GICC_AHPPIR); -} - -static inline unsigned int gicc_read_dir(uintptr_t base) -{ - return mmio_read_32(base + GICC_DIR); -} - -static inline unsigned int gicc_read_iidr(uintptr_t base) -{ - return mmio_read_32(base + GICC_IIDR); -} - - -/******************************************************************************* - * GIC CPU interface accessors for writing entire registers - ******************************************************************************/ - -static inline void gicc_write_ctlr(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_CTLR, val); -} - -static inline void gicc_write_pmr(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_PMR, val); -} - -static inline void gicc_write_BPR(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_BPR, val); -} - - -static inline void gicc_write_IAR(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_IAR, val); -} - -static inline void gicc_write_EOIR(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_EOIR, val); -} - -static inline void gicc_write_hppir(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_HPPIR, val); -} - -static inline void gicc_write_dir(uintptr_t base, unsigned int val) -{ - mmio_write_32(base + GICC_DIR, val); -} - -/******************************************************************************* - * Prototype of function to map an interrupt type to the interrupt line used to - * signal it. - ******************************************************************************/ -uint32_t gicv2_interrupt_type_to_line(uint32_t cpuif_base, uint32_t type); - -#endif /*__ASSEMBLY__*/ - -#endif /* __GIC_V2_H__ */ diff --git a/include/drivers/arm/gic_v3.h b/include/drivers/arm/gic_v3.h deleted file mode 100644 index 549b4d9f3..000000000 --- a/include/drivers/arm/gic_v3.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __GIC_V3_H__ -#define __GIC_V3_H__ - -/****************************************************************************** - * THIS DRIVER IS DEPRECATED. For GICv2 systems, use the driver in gicv2.h - * and for GICv3 systems, use the driver in gicv3.h. - *****************************************************************************/ -#if ERROR_DEPRECATED -#error " The legacy ARM GIC driver is deprecated." -#endif - -#include <mmio.h> -#include <stdint.h> - -/* GICv3 Re-distributor interface registers & shifts */ -#define GICR_PCPUBASE_SHIFT 0x11 -#define GICR_TYPER 0x08 -#define GICR_WAKER 0x14 - -/* GICR_WAKER bit definitions */ -#define WAKER_CA (U(1) << 2) -#define WAKER_PS (U(1) << 1) - -/* GICR_TYPER bit definitions */ -#define GICR_TYPER_AFF_SHIFT 32 -#define GICR_TYPER_AFF_MASK 0xffffffff -#define GICR_TYPER_LAST (U(1) << 4) - -/* GICv3 ICC_SRE register bit definitions*/ -#define ICC_SRE_EN (U(1) << 3) -#define ICC_SRE_SRE (U(1) << 0) - -/******************************************************************************* - * GICv3 defintions - ******************************************************************************/ -#define GICV3_AFFLVL_MASK 0xff -#define GICV3_AFF0_SHIFT 0 -#define GICV3_AFF1_SHIFT 8 -#define GICV3_AFF2_SHIFT 16 -#define GICV3_AFF3_SHIFT 24 -#define GICV3_AFFINITY_MASK 0xffffffff - -/******************************************************************************* - * Function prototypes - ******************************************************************************/ -uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr); - -/******************************************************************************* - * GIC Redistributor interface accessors - ******************************************************************************/ -static inline uint32_t gicr_read_waker(uintptr_t base) -{ - return mmio_read_32(base + GICR_WAKER); -} - -static inline void gicr_write_waker(uintptr_t base, uint32_t val) -{ - mmio_write_32(base + GICR_WAKER, val); -} - -static inline uint64_t gicr_read_typer(uintptr_t base) -{ - return mmio_read_64(base + GICR_TYPER); -} - - -#endif /* __GIC_V3_H__ */ diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h index d0480dba2..c80f80b69 100644 --- a/include/drivers/arm/gicv2.h +++ b/include/drivers/arm/gicv2.h @@ -7,6 +7,8 @@ #ifndef __GICV2_H__ #define __GICV2_H__ +#include <gic_common.h> + /******************************************************************************* * GICv2 miscellaneous definitions ******************************************************************************/ @@ -132,14 +134,6 @@ * The 'gicc_base' field contains the base address of the CPU Interface * programmer's view. * - * The 'g0_interrupt_array' field is a pointer to an array in which each entry - * corresponds to an ID of a Group 0 interrupt. This field is ignored when - * 'interrupt_props' field is used. This field is deprecated. - * - * The 'g0_interrupt_num' field contains the number of entries in the - * 'g0_interrupt_array'. This field is ignored when 'interrupt_props' field is - * used. This field is deprecated. - * * The 'target_masks' is a pointer to an array containing 'target_masks_num' * elements. The GIC driver will populate the array with per-PE target mask to * use to when targeting interrupts. @@ -155,10 +149,6 @@ typedef struct gicv2_driver_data { uintptr_t gicd_base; uintptr_t gicc_base; -#if !ERROR_DEPRECATED - unsigned int g0_interrupt_num __deprecated; - const unsigned int *g0_interrupt_array __deprecated; -#endif unsigned int *target_masks; unsigned int target_masks_num; const interrupt_prop_t *interrupt_props; diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index c9e28bae6..9c291eb3f 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -276,23 +276,6 @@ static inline void gicv3_end_of_interrupt(unsigned int id) * The 'gicr_base' field contains the base address of the Re-distributor * interface programmer's view. * - * The 'g0_interrupt_array' field is a pointer to an array in which each entry - * corresponds to an ID of a Group 0 interrupt. This field is ignored when - * 'interrupt_props' field is used. This field is deprecated. - * - * The 'g0_interrupt_num' field contains the number of entries in the - * 'g0_interrupt_array'. This field is ignored when 'interrupt_props' field is - * used. This field is deprecated. - * - * The 'g1s_interrupt_array' field is a pointer to an array in which each entry - * corresponds to an ID of a Group 1 interrupt. This field is ignored when - * 'interrupt_props' field is used. This field is deprecated. - * - * The 'g1s_interrupt_num' field contains the number of entries in the - * 'g1s_interrupt_array'. This field must be 0 if 'interrupt_props' field is - * used. This field is ignored when 'interrupt_props' field is used. This field - * is deprecated. - * * The 'interrupt_props' field is a pointer to an array that enumerates secure * interrupts and their properties. If this field is not NULL, both * 'g0_interrupt_array' and 'g1s_interrupt_array' fields are ignored. @@ -326,12 +309,6 @@ typedef unsigned int (*mpidr_hash_fn)(u_register_t mpidr); typedef struct gicv3_driver_data { uintptr_t gicd_base; uintptr_t gicr_base; -#if !ERROR_DEPRECATED - unsigned int g0_interrupt_num __deprecated; - unsigned int g1s_interrupt_num __deprecated; - const unsigned int *g0_interrupt_array __deprecated; - const unsigned int *g1s_interrupt_array __deprecated; -#endif const interrupt_prop_t *interrupt_props; unsigned int interrupt_props_num; unsigned int rdistif_num; diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h index 7f354f828..095099c60 100644 --- a/include/drivers/arm/tzc400.h +++ b/include/drivers/arm/tzc400.h @@ -86,16 +86,6 @@ TZC_REGION_ATTR_F_EN_SHIFT) /* - * Define some macros for backward compatibility with existing tzc400 clients. - */ -#if !ERROR_DEPRECATED -#define REG_ATTR_FILTER_BIT(x) ((1 << x) \ - << TZC_REGION_ATTR_F_EN_SHIFT) -#define REG_ATTR_FILTER_BIT_ALL (TZC_400_REGION_ATTR_F_EN_MASK << \ - TZC_REGION_ATTR_F_EN_SHIFT) -#endif /* __ERROR_DEPRECATED__ */ - -/* * All TZC region configuration registers are placed one after another. It * depicts size of block of registers for programming each region. */ @@ -123,24 +113,6 @@ void tzc400_set_action(tzc_action_t action); void tzc400_enable_filters(void); void tzc400_disable_filters(void); -/* - * Deprecated APIs - */ -static inline void tzc_init(uintptr_t base) __deprecated; -static inline void tzc_configure_region0( - tzc_region_attributes_t sec_attr, - unsigned int ns_device_access) __deprecated; -static inline void tzc_configure_region( - unsigned int filters, - int region, - unsigned long long region_base, - unsigned long long region_top, - tzc_region_attributes_t sec_attr, - unsigned int ns_device_access) __deprecated; -static inline void tzc_set_action(tzc_action_t action) __deprecated; -static inline void tzc_enable_filters(void) __deprecated; -static inline void tzc_disable_filters(void) __deprecated; - static inline void tzc_init(uintptr_t base) { tzc400_init(base); diff --git a/include/drivers/auth/mbedtls/mbedtls_config.h b/include/drivers/auth/mbedtls/mbedtls_config.h index 59aeea992..cc57b7798 100644 --- a/include/drivers/auth/mbedtls/mbedtls_config.h +++ b/include/drivers/auth/mbedtls/mbedtls_config.h @@ -30,9 +30,6 @@ /* Prevent mbed TLS from using snprintf so that it can use tf_snprintf. */ #define MBEDTLS_PLATFORM_SNPRINTF_ALT -#if !ERROR_DEPRECATED -#define MBEDTLS_PKCS1_V15 -#endif #define MBEDTLS_PKCS1_V21 #define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h index be94887f4..3536d2032 100644 --- a/include/lib/aarch32/arch.h +++ b/include/lib/aarch32/arch.h @@ -126,10 +126,6 @@ #define SDCR_SPD_ENABLE U(0x3) #define SDCR_RESET_VAL U(0x0) -#if !ERROR_DEPRECATED -#define SDCR_DEF_VAL SDCR_SPD(SDCR_SPD_DISABLE) -#endif - /* HSCTLR definitions */ #define HSCTLR_RES1 ((U(1) << 29) | (U(1) << 28) | (U(1) << 23) | \ (U(1) << 22) | (U(1) << 18) | (U(1) << 16) | \ @@ -220,10 +216,6 @@ #define NSASEDIS_BIT (U(1) << 15) #define NSTRCDIS_BIT (U(1) << 20) /* NOTE: correct typo in the definitions */ -#if !ERROR_DEPRECATED -#define NASCR_CP11_BIT (U(1) << 11) -#define NASCR_CP10_BIT (U(1) << 10) -#endif #define NSACR_CP11_BIT (U(1) << 11) #define NSACR_CP10_BIT (U(1) << 10) #define NSACR_IMP_DEF_MASK (U(0x7) << 16) diff --git a/include/lib/aarch32/smcc_helpers.h b/include/lib/aarch32/smcc_helpers.h deleted file mode 100644 index 7f79f8fa2..000000000 --- a/include/lib/aarch32/smcc_helpers.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __SMCC_HELPERS_H__ -#define __SMCC_HELPERS_H__ - -#if !ERROR_DEPRECATED -#include <smccc_helpers.h> -#endif - -#endif /* __SMCC_HELPERS_H__ */ diff --git a/include/lib/aarch32/smcc_macros.S b/include/lib/aarch32/smcc_macros.S deleted file mode 100644 index 66f3d0ea4..000000000 --- a/include/lib/aarch32/smcc_macros.S +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef __SMCC_MACROS_S__ -#define __SMCC_MACROS_S__ - -#if !ERROR_DEPRECATED -#include <smccc_macros.S> - -#define smcc_save_gp_mode_regs smccc_save_gp_mode_regs -#endif - -#endif /* __SMCC_MACROS_S__ */ diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index fed594457..a6022cb01 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -245,10 +245,6 @@ #define MDCR_TPM_BIT (U(1) << 6) #define MDCR_EL3_RESET_VAL U(0x0) -#if !ERROR_DEPRECATED -#define MDCR_DEF_VAL (MDCR_SDD_BIT | MDCR_SPD32(MDCR_SPD32_DISABLE)) -#endif - /* MDCR_EL2 definitions */ #define MDCR_EL2_TPMS (U(1) << 14) #define MDCR_EL2_E2PB(x) ((x) << 12) diff --git a/include/lib/aarch64/smcc_helpers.h b/include/lib/aarch64/smcc_helpers.h deleted file mode 100644 index 11300b7eb..000000000 --- a/include/lib/aarch64/smcc_helpers.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __SMCC_HELPERS_H__ -#define __SMCC_HELPERS_H__ - -#if !ERROR_DEPRECATED -#include <smccc_helpers.h> -#endif - -#endif /* __SMCC_HELPERS_H__ */ diff --git a/include/lib/cpus/aarch32/cortex_a53.h b/include/lib/cpus/aarch32/cortex_a53.h index 8e86df465..a7a681f53 100644 --- a/include/lib/cpus/aarch32/cortex_a53.h +++ b/include/lib/cpus/aarch32/cortex_a53.h @@ -67,16 +67,4 @@ ******************************************************************************/ #define CORTEX_A53_L2MERRSR p15, 3, c15 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions so - * as not to break platforms that continue using them. - */ -#define CORTEX_A53_ACTLR CORTEX_A53_CPUACTLR - -#define CORTEX_A53_ACTLR_ENDCCASCI_SHIFT CORTEX_A53_CPUACTLR_ENDCCASCI_SHIFT -#define CORTEX_A53_ACTLR_ENDCCASCI CORTEX_A53_CPUACTLR_ENDCCASCI -#define CORTEX_A53_ACTLR_DTAH CORTEX_A53_CPUACTLR_DTAH -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A53_H__ */ diff --git a/include/lib/cpus/aarch32/cortex_a57.h b/include/lib/cpus/aarch32/cortex_a57.h index 18cabe11b..3f0fb04be 100644 --- a/include/lib/cpus/aarch32/cortex_a57.h +++ b/include/lib/cpus/aarch32/cortex_a57.h @@ -79,22 +79,4 @@ ******************************************************************************/ #define CORTEX_A57_L2MERRSR p15, 3, c15 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions so - * as not to break platforms that continue using them. - */ -#define CORTEX_A57_ACTLR CORTEX_A57_CPUACTLR - -#define CORTEX_A57_ACTLR_DIS_LOAD_PASS_DMB CORTEX_A57_CPUACTLR_DIS_LOAD_PASS_DMB -#define CORTEX_A57_ACTLR_GRE_NGRE_AS_NGNRE CORTEX_A57_CPUACTLR_GRE_NGRE_AS_NGNRE -#define CORTEX_A57_ACTLR_DIS_OVERREAD CORTEX_A57_CPUACTLR_DIS_OVERREAD -#define CORTEX_A57_ACTLR_NO_ALLOC_WBWA CORTEX_A57_CPUACTLR_NO_ALLOC_WBWA -#define CORTEX_A57_ACTLR_DCC_AS_DCCI CORTEX_A57_CPUACTLR_DCC_AS_DCCI -#define CORTEX_A57_ACTLR_FORCE_FPSCR_FLUSH CORTEX_A57_CPUACTLR_FORCE_FPSCR_FLUSH -#define CORTEX_A57_ACTLR_DIS_STREAMING CORTEX_A57_CPUACTLR_DIS_STREAMING -#define CORTEX_A57_ACTLR_DIS_L1_STREAMING CORTEX_A57_CPUACTLR_DIS_L1_STREAMING -#define CORTEX_A57_ACTLR_DIS_INDIRECT_PREDICTOR CORTEX_A57_CPUACTLR_DIS_INDIRECT_PREDICTOR -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A57_H__ */ diff --git a/include/lib/cpus/aarch32/cortex_a72.h b/include/lib/cpus/aarch32/cortex_a72.h index 0331ace7c..1a3c014ea 100644 --- a/include/lib/cpus/aarch32/cortex_a72.h +++ b/include/lib/cpus/aarch32/cortex_a72.h @@ -54,16 +54,4 @@ ******************************************************************************/ #define CORTEX_A72_L2MERRSR p15, 3, c15 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions so - * as not to break platforms that continue using them. - */ -#define CORTEX_A72_ACTLR CORTEX_A72_CPUACTLR - -#define CORTEX_A72_ACTLR_DISABLE_L1_DCACHE_HW_PFTCH CORTEX_A72_CPUACTLR_DISABLE_L1_DCACHE_HW_PFTCH -#define CORTEX_A72_ACTLR_NO_ALLOC_WBWA CORTEX_A72_CPUACTLR_NO_ALLOC_WBWA -#define CORTEX_A72_ACTLR_DCC_AS_DCCI CORTEX_A72_CPUACTLR_DCC_AS_DCCI -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A72_H__ */ diff --git a/include/lib/cpus/aarch64/cortex_a53.h b/include/lib/cpus/aarch64/cortex_a53.h index 22c68006f..9aa118b55 100644 --- a/include/lib/cpus/aarch64/cortex_a53.h +++ b/include/lib/cpus/aarch64/cortex_a53.h @@ -71,21 +71,4 @@ ******************************************************************************/ #define CORTEX_A53_L2MERRSR_EL1 S3_1_C15_C2_3 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions - * so as not to break platforms that continue using them. - */ -#define CORTEX_A53_ACTLR_EL1 CORTEX_A53_CPUACTLR_EL1 - -#define CORTEX_A53_ACTLR_ENDCCASCI_SHIFT CORTEX_A53_CPUACTLR_EL1_ENDCCASCI_SHIFT -#define CORTEX_A53_ACTLR_ENDCCASCI CORTEX_A53_CPUACTLR_EL1_ENDCCASCI -#define CORTEX_A53_ACTLR_RADIS_SHIFT CORTEX_A53_CPUACTLR_EL1_RADIS_SHIFT -#define CORTEX_A53_ACTLR_RADIS CORTEX_A53_CPUACTLR_EL1_RADIS -#define CORTEX_A53_ACTLR_L1RADIS_SHIFT CORTEX_A53_CPUACTLR_EL1_L1RADIS_SHIFT -#define CORTEX_A53_ACTLR_L1RADIS CORTEX_A53_CPUACTLR_EL1_L1RADIS -#define CORTEX_A53_ACTLR_DTAH_SHIFT CORTEX_A53_CPUACTLR_EL1_DTAH_SHIFT -#define CORTEX_A53_ACTLR_DTAH CORTEX_A53_CPUACTLR_EL1_DTAH -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A53_H__ */ diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h index 83ec93426..97d074e00 100644 --- a/include/lib/cpus/aarch64/cortex_a57.h +++ b/include/lib/cpus/aarch64/cortex_a57.h @@ -81,22 +81,4 @@ ******************************************************************************/ #define CORTEX_A57_L2MERRSR_EL1 S3_1_C15_C2_3 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions so - * as not to break platforms that continue using them. - */ -#define CORTEX_A57_ACTLR_EL1 CORTEX_A57_CPUACTLR_EL1 - -#define CORTEX_A57_ACTLR_DIS_LOAD_PASS_DMB CORTEX_A57_CPUACTLR_EL1_DIS_LOAD_PASS_DMB -#define CORTEX_A57_ACTLR_GRE_NGRE_AS_NGNRE CORTEX_A57_CPUACTLR_EL1_GRE_NGRE_AS_NGNRE -#define CORTEX_A57_ACTLR_DIS_OVERREAD CORTEX_A57_CPUACTLR_EL1_DIS_OVERREAD -#define CORTEX_A57_ACTLR_NO_ALLOC_WBWA CORTEX_A57_CPUACTLR_EL1_NO_ALLOC_WBWA -#define CORTEX_A57_ACTLR_DCC_AS_DCCI CORTEX_A57_CPUACTLR_EL1_DCC_AS_DCCI -#define CORTEX_A57_ACTLR_FORCE_FPSCR_FLUSH CORTEX_A57_CPUACTLR_EL1_FORCE_FPSCR_FLUSH -#define CORTEX_A57_ACTLR_DIS_STREAMING CORTEX_A57_CPUACTLR_EL1_DIS_STREAMING -#define CORTEX_A57_ACTLR_DIS_L1_STREAMING CORTEX_A57_CPUACTLR_EL1_DIS_L1_STREAMING -#define CORTEX_A57_ACTLR_DIS_INDIRECT_PREDICTOR CORTEX_A57_CPUACTLR_EL1_DIS_INDIRECT_PREDICTOR -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A57_H__ */ diff --git a/include/lib/cpus/aarch64/cortex_a72.h b/include/lib/cpus/aarch64/cortex_a72.h index f5ca2ee7a..5b9e06de2 100644 --- a/include/lib/cpus/aarch64/cortex_a72.h +++ b/include/lib/cpus/aarch64/cortex_a72.h @@ -61,16 +61,4 @@ ******************************************************************************/ #define CORTEX_A72_L2MERRSR_EL1 S3_1_C15_C2_3 -#if !ERROR_DEPRECATED -/* - * These registers were previously wrongly named. Provide previous definitions so - * as not to break platforms that continue using them. - */ -#define CORTEX_A72_ACTLR CORTEX_A72_CPUACTLR_EL1 - -#define CORTEX_A72_ACTLR_DISABLE_L1_DCACHE_HW_PFTCH CORTEX_A72_CPUACTLR_EL1_DISABLE_L1_DCACHE_HW_PFTCH -#define CORTEX_A72_ACTLR_NO_ALLOC_WBWA CORTEX_A72_CPUACTLR_EL1_NO_ALLOC_WBWA -#define CORTEX_A72_ACTLR_DCC_AS_DCCI CORTEX_A72_CPUACTLR_EL1_DCC_AS_DCCI -#endif /* !ERROR_DEPRECATED */ - #endif /* __CORTEX_A72_H__ */ diff --git a/include/lib/el3_runtime/context_mgmt.h b/include/lib/el3_runtime/context_mgmt.h index e3f7726a8..c5bbb2b43 100644 --- a/include/lib/el3_runtime/context_mgmt.h +++ b/include/lib/el3_runtime/context_mgmt.h @@ -47,16 +47,6 @@ void cm_write_scr_el3_bit(uint32_t security_state, void cm_set_next_eret_context(uint32_t security_state); uint32_t cm_get_scr_el3(uint32_t security_state); - -void cm_init_context(uint64_t mpidr, - const struct entry_point_info *ep) __deprecated; - -void *cm_get_context_by_mpidr(uint64_t mpidr, - uint32_t security_state) __deprecated; -void cm_set_context_by_mpidr(uint64_t mpidr, - void *context, - uint32_t security_state) __deprecated; - /* Inline definitions */ /******************************************************************************* diff --git a/include/lib/psci/psci.h b/include/lib/psci/psci.h index fa0da9fee..b27e48153 100644 --- a/include/lib/psci/psci.h +++ b/include/lib/psci/psci.h @@ -10,9 +10,6 @@ #include <bakery_lock.h> #include <bl_common.h> #include <platform_def.h> /* for PLAT_NUM_PWR_DOMAINS */ -#if ENABLE_PLAT_COMPAT -#include <psci_compat.h> -#endif #include <psci_lib.h> /* To maintain compatibility for SPDs */ #include <utils_def.h> @@ -350,12 +347,6 @@ int psci_features(unsigned int psci_fid); void __dead2 psci_power_down_wfi(void); void psci_arch_setup(void); -/* - * The below API is deprecated. This is now replaced by bl31_warmboot_entry in - * AArch64. - */ -void psci_entrypoint(void) __deprecated; - #endif /*__ASSEMBLY__*/ #endif /* PSCI_H */ diff --git a/include/lib/psci/psci_compat.h b/include/lib/psci/psci_compat.h deleted file mode 100644 index 11ed16d00..000000000 --- a/include/lib/psci/psci_compat.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef PSCI_COMPAT_H -#define PSCI_COMPAT_H - -#include <arch.h> -#include <platform_def.h> -#include <utils_def.h> - -#ifndef __ASSEMBLY__ -/* - * The below declarations are to enable compatibility for the platform ports - * using the old platform interface and psci helpers. - */ -#define PLAT_MAX_PWR_LVL PLATFORM_MAX_AFFLVL -#define PLAT_NUM_PWR_DOMAINS PLATFORM_NUM_AFFS - -/******************************************************************************* - * PSCI affinity related constants. An affinity instance could - * be present or absent physically to cater for asymmetric topologies. - ******************************************************************************/ -#define PSCI_AFF_ABSENT 0x0 -#define PSCI_AFF_PRESENT 0x1 - -#define PSCI_STATE_ON U(0x0) -#define PSCI_STATE_OFF U(0x1) -#define PSCI_STATE_ON_PENDING U(0x2) -#define PSCI_STATE_SUSPEND U(0x3) - -/* - * Using the compatibility platform interfaces means that the local states - * used in psci_power_state_t need to only convey whether its power down - * or standby state. The onus is on the platform port to do the right thing - * including the state coordination in case multiple power down states are - * involved. Hence if we assume 3 generic states viz, run, standby and - * power down, we can assign 1 and 2 to standby and power down respectively. - */ -#define PLAT_MAX_RET_STATE U(1) -#define PLAT_MAX_OFF_STATE U(2) - -/* - * Macro to represent invalid affinity level within PSCI. - */ -#define PSCI_INVALID_DATA -1 - -#define psci_get_pstate_afflvl(pstate) psci_get_pstate_pwrlvl(pstate) - -/* - * This array stores the 'power_state' requests of each CPU during - * CPU_SUSPEND and SYSTEM_SUSPEND which will be populated by the - * compatibility layer when appropriate platform hooks are invoked. - */ -extern unsigned int psci_power_state_compat[PLATFORM_CORE_COUNT]; - -/******************************************************************************* - * Structure populated by platform specific code to export routines which - * perform common low level pm functions - ******************************************************************************/ -typedef struct plat_pm_ops { - void (*affinst_standby)(unsigned int power_state); - int (*affinst_on)(unsigned long mpidr, - unsigned long sec_entrypoint, - unsigned int afflvl, - unsigned int state); - void (*affinst_off)(unsigned int afflvl, unsigned int state); - void (*affinst_suspend)(unsigned long sec_entrypoint, - unsigned int afflvl, - unsigned int state); - void (*affinst_on_finish)(unsigned int afflvl, unsigned int state); - void (*affinst_suspend_finish)(unsigned int afflvl, - unsigned int state); - void (*system_off)(void) __dead2; - void (*system_reset)(void) __dead2; - int (*validate_power_state)(unsigned int power_state); - int (*validate_ns_entrypoint)(unsigned long ns_entrypoint); - unsigned int (*get_sys_suspend_power_state)(void); -} plat_pm_ops_t; - -/******************************************************************************* - * Function & Data prototypes to enable compatibility for older platform ports - ******************************************************************************/ -int psci_get_suspend_stateid_by_mpidr(unsigned long); -int psci_get_suspend_stateid(void); -int psci_get_suspend_powerstate(void); -unsigned int psci_get_max_phys_off_afflvl(void); -int psci_get_suspend_afflvl(void); - -#endif /* ____ASSEMBLY__ */ -#endif /* PSCI_COMPAT_H */ diff --git a/include/lib/smcc.h b/include/lib/smcc.h deleted file mode 100644 index ed1da2cfb..000000000 --- a/include/lib/smcc.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __SMCC_H__ -#define __SMCC_H__ - -#if !ERROR_DEPRECATED -#include <smccc.h> -#endif - -#endif /* __SMCC_H__ */ diff --git a/include/lib/smccc.h b/include/lib/smccc.h index a07e510b8..b3dad1027 100644 --- a/include/lib/smccc.h +++ b/include/lib/smccc.h @@ -57,17 +57,6 @@ * does not equal SMC_UNK. This is to ensure that the caller won't mistake the * returned UUID in x0 for an invalid SMC error return */ -#if !ERROR_DEPRECATED -#define DEFINE_SVC_UUID(_name, _tl, _tm, _th, _cl, _ch, \ - _n0, _n1, _n2, _n3, _n4, _n5) \ - CASSERT((uint32_t)(_tl) != (uint32_t) SMC_UNK, invalid_svc_uuid);\ - static const uuid_t _name = { \ - _tl, _tm, _th, _cl, _ch, \ - { _n0, _n1, _n2, _n3, _n4, _n5 } \ - } -#endif - - #define DEFINE_SVC_UUID2(_name, _tl, _tm, _th, _cl, _ch, \ _n0, _n1, _n2, _n3, _n4, _n5) \ CASSERT((uint32_t)(_tl) != (uint32_t) SMC_UNK, invalid_svc_uuid);\ diff --git a/include/lib/smccc_v1.h b/include/lib/smccc_v1.h index 8718d1586..98ef0211a 100644 --- a/include/lib/smccc_v1.h +++ b/include/lib/smccc_v1.h @@ -66,9 +66,6 @@ #define SMC_32 U(0) #define SMC_TYPE_FAST ULL(1) -#if !ERROR_DEPRECATED -#define SMC_TYPE_STD ULL(0) -#endif #define SMC_TYPE_YIELD ULL(0) #define SMC_OK ULL(0) diff --git a/include/lib/utils.h b/include/lib/utils.h index 09ec8d99b..d46d8461d 100644 --- a/include/lib/utils.h +++ b/include/lib/utils.h @@ -7,10 +7,6 @@ #ifndef __UTILS_H__ #define __UTILS_H__ -#if !ERROR_DEPRECATED -#include <utils_def.h> -#endif - /* * C code should be put in this part of the header to avoid breaking ASM files * or linker scripts including it. diff --git a/include/lib/xlat_tables/xlat_mmu_helpers.h b/include/lib/xlat_tables/xlat_mmu_helpers.h index ab491e367..85effcaa5 100644 --- a/include/lib/xlat_tables/xlat_mmu_helpers.h +++ b/include/lib/xlat_tables/xlat_mmu_helpers.h @@ -67,11 +67,6 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags, #ifdef AARCH32 /* AArch32 specific translation table API */ -#if !ERROR_DEPRECATED -void enable_mmu_secure(unsigned int flags); -void enable_mmu_direct(unsigned int flags); -#endif - void enable_mmu_svc_mon(unsigned int flags); void enable_mmu_hyp(unsigned int flags); diff --git a/include/lib/xlat_tables/xlat_tables.h b/include/lib/xlat_tables/xlat_tables.h index 4097c76f4..050679d94 100644 --- a/include/lib/xlat_tables/xlat_tables.h +++ b/include/lib/xlat_tables/xlat_tables.h @@ -71,10 +71,6 @@ #define MT_CODE (MT_MEMORY | MT_RO | MT_EXECUTE) #define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER) -#if !ERROR_DEPRECATED -typedef unsigned int mmap_attr_t; -#endif - /* * Structure for specifying a single region of memory. */ diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h index 52c4dc6dd..4bd0bb231 100644 --- a/include/lib/xlat_tables/xlat_tables_v2.h +++ b/include/lib/xlat_tables/xlat_tables_v2.h @@ -104,10 +104,6 @@ #define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER) #define MT_RW_DATA (MT_MEMORY | MT_RW | MT_EXECUTE_NEVER) -#if !ERROR_DEPRECATED -typedef unsigned int mmap_attr_t; -#endif - /* * Structure for specifying a single region of memory. */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index c4994173a..23cd12f51 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -166,21 +166,6 @@ #define ARM_IRQ_SEC_SGI_7 15 /* - * List of secure interrupts are deprecated, but are retained only to support - * legacy configurations. - */ -#define ARM_G1S_IRQS ARM_IRQ_SEC_PHY_TIMER, \ - ARM_IRQ_SEC_SGI_1, \ - ARM_IRQ_SEC_SGI_2, \ - ARM_IRQ_SEC_SGI_3, \ - ARM_IRQ_SEC_SGI_4, \ - ARM_IRQ_SEC_SGI_5, \ - ARM_IRQ_SEC_SGI_7 - -#define ARM_G0_IRQS ARM_IRQ_SEC_SGI_0, \ - ARM_IRQ_SEC_SGI_6 - -/* * Define a list of Group 1 Secure and Group 0 interrupt properties as per GICv3 * terminology. On a GICv2 system or mode, the lists will be merged and treated * as Group 0 interrupts. diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 53b4a45c1..3f344abce 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -17,7 +17,6 @@ /******************************************************************************* * Forward declarations ******************************************************************************/ -struct bl31_params; struct meminfo; struct image_info; struct bl_params; @@ -197,13 +196,8 @@ void arm_bl2u_platform_setup(void); void arm_bl2u_plat_arch_setup(void); /* BL31 utility functions */ -#if LOAD_IMAGE_V2 void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, uintptr_t hw_config, void *plat_params_from_bl2); -#else -void arm_bl31_early_platform_setup(struct bl31_params *from_bl2, uintptr_t soc_fw_config, - uintptr_t hw_config, void *plat_params_from_bl2); -#endif /* LOAD_IMAGE_V2 */ void arm_bl31_platform_setup(void); void arm_bl31_plat_runtime_setup(void); void arm_bl31_plat_arch_setup(void); @@ -252,13 +246,11 @@ void plat_arm_error_handler(int err); unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr); #endif -#if LOAD_IMAGE_V2 /* * This function is called after loading SCP_BL2 image and it is used to perform * any platform-specific actions required to handle the SCP firmware. */ int plat_arm_bl2_handle_scp_bl2(struct image_info *scp_bl2_image_info); -#endif /* * Optional functions required in ARM standard platforms diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h index e66af782a..64807fd41 100644 --- a/include/plat/common/common_def.h +++ b/include/plat/common/common_def.h @@ -31,7 +31,6 @@ */ #define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n" -#if LOAD_IMAGE_V2 #define BL2_IMAGE_DESC { \ .image_id = BL2_IMAGE_ID, \ SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \ @@ -42,17 +41,6 @@ VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\ .ep_info.pc = BL2_BASE, \ } -#else /* LOAD_IMAGE_V2 */ -#define BL2_IMAGE_DESC { \ - .image_id = BL2_IMAGE_ID, \ - SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \ - VERSION_1, image_info_t, 0), \ - .image_info.image_base = BL2_BASE, \ - SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \ - VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\ - .ep_info.pc = BL2_BASE, \ -} -#endif /* LOAD_IMAGE_V2 */ /* * The following constants identify the extents of the code & read-only data diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index e0297ae2e..a30b57987 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -17,7 +17,6 @@ struct auth_img_desc_s; struct meminfo; struct image_info; struct entry_point_info; -struct bl31_params; struct image_desc; struct bl_load_info; struct bl_params; @@ -38,7 +37,6 @@ struct secure_partition_boot_info; /******************************************************************************* * Mandatory common functions ******************************************************************************/ -unsigned long long plat_get_syscnt_freq(void) __deprecated; unsigned int plat_get_syscnt_freq2(void); int plat_get_image_source(unsigned int image_id, @@ -136,10 +134,6 @@ int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size, /******************************************************************************* * Optional BL1 functions (may be overridden) ******************************************************************************/ -#if !ERROR_DEPRECATED -void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout, - struct meminfo *bl2_mem_layout); -#endif /* * The following functions are used for image loading process in BL1. */ @@ -169,14 +163,10 @@ int bl1_plat_handle_post_image_load(unsigned int image_id); * Mandatory BL2 functions ******************************************************************************/ void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3); -#if !ERROR_DEPRECATED -void bl2_early_platform_setup(struct meminfo *mem_layout); -#endif void bl2_plat_arch_setup(void); void bl2_platform_setup(void); struct meminfo *bl2_plat_sec_mem_layout(void); -#if LOAD_IMAGE_V2 /* * This function can be used by the platforms to update/use image * information for given `image_id`. @@ -184,65 +174,6 @@ struct meminfo *bl2_plat_sec_mem_layout(void); int bl2_plat_handle_pre_image_load(unsigned int image_id); int bl2_plat_handle_post_image_load(unsigned int image_id); -#else /* LOAD_IMAGE_V2 */ - -/* - * This function returns a pointer to the shared memory that the platform has - * kept aside to pass trusted firmware related information that BL31 - * could need - */ -struct bl31_params *bl2_plat_get_bl31_params(void); - -/* - * This function returns a pointer to the shared memory that the platform - * has kept to point to entry point information of BL31 to BL2 - */ -struct entry_point_info *bl2_plat_get_bl31_ep_info(void); - -/* - * This function flushes to main memory all the params that are - * passed to BL31 - */ -void bl2_plat_flush_bl31_params(void); - -/* - * The next 2 functions allow the platform to change the entrypoint information - * for the mandatory 3rd level BL images, BL31 and BL33. This is done after - * BL2 has loaded those images into memory but before BL31 is executed. - */ -void bl2_plat_set_bl31_ep_info(struct image_info *image, - struct entry_point_info *ep); - -void bl2_plat_set_bl33_ep_info(struct image_info *image, - struct entry_point_info *ep); - -/* Gets the memory layout for BL33 */ -void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info); - -/******************************************************************************* - * Conditionally mandatory BL2 functions: must be implemented if SCP_BL2 image - * is supported - ******************************************************************************/ -/* Gets the memory layout for SCP_BL2 */ -void bl2_plat_get_scp_bl2_meminfo(struct meminfo *mem_info); - -/* - * This function is called after loading SCP_BL2 image and it is used to perform - * any platform-specific actions required to handle the SCP firmware. - */ -int bl2_plat_handle_scp_bl2(struct image_info *scp_bl2_image_info); - -/******************************************************************************* - * Conditionally mandatory BL2 functions: must be implemented if BL32 image - * is supported - ******************************************************************************/ -void bl2_plat_set_bl32_ep_info(struct image_info *image, - struct entry_point_info *ep); - -/* Gets the memory layout for BL32 */ -void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info); - -#endif /* LOAD_IMAGE_V2 */ /******************************************************************************* * Optional BL2 functions (may be overridden) @@ -283,15 +214,6 @@ int bl2u_plat_handle_scp_bl2u(void); /******************************************************************************* * Mandatory BL31 functions ******************************************************************************/ -#if !ERROR_DEPRECATED -#if LOAD_IMAGE_V2 -void bl31_early_platform_setup(void *from_bl2, - void *plat_params_from_bl2); -#else -void bl31_early_platform_setup(struct bl31_params *from_bl2, - void *plat_params_from_bl2); -#endif -#endif /* ERROR_DEPRECATED */ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3); void bl31_plat_arch_setup(void); @@ -345,7 +267,6 @@ const struct mmap_region *plat_get_secure_partition_mmap(void *cookie); const struct secure_partition_boot_info *plat_get_secure_partition_boot_info( void *cookie); -#if LOAD_IMAGE_V2 /******************************************************************************* * Mandatory BL image load functions(may be overridden). ******************************************************************************/ @@ -368,36 +289,11 @@ struct bl_params *plat_get_next_bl_params(void); */ void plat_flush_next_bl_params(void); -#endif /* LOAD_IMAGE_V2 */ - -#if ENABLE_PLAT_COMPAT -/* - * The below declarations are to enable compatibility for the platform ports - * using the old platform interface. - */ - -/******************************************************************************* - * Optional common functions (may be overridden) - ******************************************************************************/ -unsigned int platform_get_core_pos(unsigned long mpidr); - -/******************************************************************************* - * Mandatory PSCI Compatibility functions (BL31) - ******************************************************************************/ -int platform_setup_pm(const plat_pm_ops_t **); - -unsigned int plat_get_aff_count(unsigned int, unsigned long); -unsigned int plat_get_aff_state(unsigned int, unsigned long); - -#else /* __ENABLE_PLAT_COMPAT__ */ /* * The below function enable Trusted Firmware components like SPDs which * haven't migrated to the new platform API to compile on platforms which * have the compatibility layer disabled. */ unsigned int platform_core_pos_helper(unsigned long mpidr); -unsigned int platform_get_core_pos(unsigned long mpidr) __deprecated; - -#endif /* __ENABLE_PLAT_COMPAT__ */ #endif /* PLATFORM_H */ diff --git a/include/plat/marvell/a8k/common/board_marvell_def.h b/include/plat/marvell/a8k/common/board_marvell_def.h index b1054db22..e67543ed5 100644 --- a/include/plat/marvell/a8k/common/board_marvell_def.h +++ b/include/plat/marvell/a8k/common/board_marvell_def.h @@ -14,9 +14,7 @@ */ /* Size of cacheable stacks */ -#if DEBUG_XLAT_TABLE -# define PLATFORM_STACK_SIZE 0x800 -#elif IMAGE_BL1 +#if IMAGE_BL1 #if TRUSTED_BOARD_BOOT # define PLATFORM_STACK_SIZE 0x1000 #else diff --git a/include/plat/marvell/a8k/common/plat_marvell.h b/include/plat/marvell/a8k/common/plat_marvell.h index 9ca68d3bc..a62a7cb08 100644 --- a/include/plat/marvell/a8k/common/plat_marvell.h +++ b/include/plat/marvell/a8k/common/plat_marvell.h @@ -24,6 +24,15 @@ extern const mmap_region_t plat_marvell_mmap[]; <= MAX_MMAP_REGIONS, \ assert_max_mmap_regions) +struct marvell_bl31_params { + param_header_t h; + image_info_t *bl31_image_info; + entry_point_info_t *bl32_ep_info; + image_info_t *bl32_image_info; + entry_point_info_t *bl33_ep_info; + image_info_t *bl33_image_info; +}; + /* * Utility functions common to Marvell standard platforms */ @@ -67,7 +76,7 @@ uint32_t marvell_get_spsr_for_bl32_entry(void); uint32_t marvell_get_spsr_for_bl33_entry(void); /* BL31 utility functions */ -void marvell_bl31_early_platform_setup(struct bl31_params *from_bl2, +void marvell_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, uintptr_t hw_config, void *plat_params_from_bl2); |