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| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2018-03-22 08:57:52 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2018-03-26 09:45:48 +0100 |
| commit | 17e84eedb2fb40d8682802cf2e23ddf67928c51d (patch) | |
| tree | a91ef44ab2642507d6ffe1d39fd4fb5a2a1dd2cb /include | |
| parent | f13ef37a38cec17f72f08dc63bbbe546a54d78a7 (diff) | |
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GIC: Fix setting interrupt configuration
- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/drivers/arm/gic_common.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/drivers/arm/gic_common.h b/include/drivers/arm/gic_common.h index 001f57360..6e953a0dc 100644 --- a/include/drivers/arm/gic_common.h +++ b/include/drivers/arm/gic_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -29,9 +29,9 @@ /* Constant to indicate a spurious interrupt in all GIC versions */ #define GIC_SPURIOUS_INTERRUPT 1023 -/* Interrupt configurations */ -#define GIC_INTR_CFG_LEVEL 0 -#define GIC_INTR_CFG_EDGE 1 +/* Interrupt configurations: 2-bit fields with LSB reserved */ +#define GIC_INTR_CFG_LEVEL (0 << 1) +#define GIC_INTR_CFG_EDGE (1 << 1) /* Constants to categorise priorities */ #define GIC_HIGHEST_SEC_PRIORITY 0x0 |