Merge changes from topic "sm/fix_a76_errata" into integration

* changes:
  Workaround for cortex-A76 errata 1286807
  Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112

3 files changed, 48 insertions, 14 deletions

diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h
index c3ce1c4d9..c17370647 100644
--- a/include/arch/aarch64/arch_helpers.h
+++ b/include/arch/aarch64/arch_helpers.h
@@ -87,12 +87,13 @@ static inline void _op ## _type(uint64_t v)		\
  * TLB maintenance accessor prototypes
  ******************************************************************************/
 
-#if ERRATA_A57_813419
+#if ERRATA_A57_813419 || ERRATA_A76_1286807
 /*
  * Define function for TLBI instruction with type specifier that implements
- * the workaround for errata 813419 of Cortex-A57.
+ * the workaround for errata 813419 of Cortex-A57 or errata 1286807 of
+ * Cortex-A76.
  */
-#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(_type)\
+#define DEFINE_TLBIOP_ERRATA_TYPE_FUNC(_type)\
 static inline void tlbi ## _type(void)			\
 {							\
 	__asm__("tlbi " #_type "\n"			\
@@ -102,9 +103,10 @@ static inline void tlbi ## _type(void)			\
 
 /*
  * Define function for TLBI instruction with register parameter that implements
- * the workaround for errata 813419 of Cortex-A57.
+ * the workaround for errata 813419 of Cortex-A57 or errata 1286807 of
+ * Cortex-A76.
  */
-#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(_type)	\
+#define DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(_type)	\
 static inline void tlbi ## _type(uint64_t v)			\
 {								\
 	__asm__("tlbi " #_type ", %0\n"				\
@@ -125,27 +127,51 @@ static inline void dc ## _name(uint64_t v)			\
 }
 #endif /* ERRATA_A53_819472 || ERRATA_A53_824069 || ERRATA_A53_827319 */
 
+#if ERRATA_A57_813419
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
-#if ERRATA_A57_813419
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3)
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3is)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
+#elif ERRATA_A76_1286807
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle1)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle1is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle2)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle2is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(vmalle1)
 #else
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is)
-#endif
 DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
+#endif
 
+#if ERRATA_A57_813419
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
-#if ERRATA_A57_813419
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vae3is)
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vale3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale3is)
+#elif ERRATA_A76_1286807
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vaae1is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vaale1is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae2is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale2is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale3is)
 #else
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae3is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale3is)
 #endif
diff --git a/include/arch/aarch64/asm_macros.S b/include/arch/aarch64/asm_macros.S
index 387be4ca3..9b1218559 100644
--- a/include/arch/aarch64/asm_macros.S
+++ b/include/arch/aarch64/asm_macros.S
@@ -12,9 +12,9 @@
 
 /*
  * TLBI instruction with type specifier that implements the workaround for
- * errata 813419 of Cortex-A57.
+ * errata 813419 of Cortex-A57 or errata 1286807 of Cortex-A76.
  */
-#if ERRATA_A57_813419
+#if ERRATA_A57_813419 || ERRATA_A76_1286807
 #define TLB_INVALIDATE(_type) \
 	tlbi	_type; \
 	dsb	ish; \
diff --git a/include/lib/cpus/aarch64/cortex_a76.h b/include/lib/cpus/aarch64/cortex_a76.h
index c2af8cad9..7dc7e068a 100644
--- a/include/lib/cpus/aarch64/cortex_a76.h
+++ b/include/lib/cpus/aarch64/cortex_a76.h
@@ -19,6 +19,7 @@
 #define CORTEX_A76_CPUECTLR_EL1		S3_0_C15_C1_4
 
 #define CORTEX_A76_CPUECTLR_EL1_WS_THR_L2	(ULL(3) << 24)
+#define CORTEX_A76_CPUECTLR_EL1_BIT_51		(ULL(1) << 51)
 
 /*******************************************************************************
  * CPU Auxiliary Control register specific definitions.
@@ -27,10 +28,17 @@
 
 #define CORTEX_A76_CPUACTLR_EL1_DISABLE_STATIC_PREDICTION	(ULL(1) << 6)
 
+#define CORTEX_A76_CPUACTLR_EL1_BIT_13	(ULL(1) << 13)
+
 #define CORTEX_A76_CPUACTLR2_EL1	S3_0_C15_C1_1
 
 #define CORTEX_A76_CPUACTLR2_EL1_DISABLE_LOAD_PASS_STORE	(ULL(1) << 16)
 
+#define CORTEX_A76_CPUACTLR3_EL1	S3_0_C15_C1_2
+
+#define CORTEX_A76_CPUACTLR3_EL1_BIT_10	(ULL(1) << 10)
+
+
 /* Definitions of register field mask in CORTEX_A76_CPUPWRCTLR_EL1 */
 #define CORTEX_A76_CORE_PWRDN_EN_MASK	U(0x1)