diff options
author | Antonio Niño Díaz <antonio.ninodiaz@arm.com> | 2019-04-09 09:21:51 +0000 |
---|---|---|
committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-04-09 09:21:51 +0000 |
commit | 01e7e0cadcfee14cc8ce6846cbcab6182fbf2cea (patch) | |
tree | ab3dba3d88eb0507c3678d401cb3773987edf653 /include | |
parent | 7a246d64d549ef7ec7c73cdd5ad7d3918b591023 (diff) | |
parent | 9ccc5a573363660b1f537dda6bd37327e8f1a2ea (diff) | |
download | platform_external_arm-trusted-firmware-01e7e0cadcfee14cc8ce6846cbcab6182fbf2cea.tar.gz platform_external_arm-trusted-firmware-01e7e0cadcfee14cc8ce6846cbcab6182fbf2cea.tar.bz2 platform_external_arm-trusted-firmware-01e7e0cadcfee14cc8ce6846cbcab6182fbf2cea.zip |
Merge "Add support for Cortex-A76AE CPU" into integration
Diffstat (limited to 'include')
-rw-r--r-- | include/lib/cpus/aarch64/cortex_a76ae.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a76ae.h b/include/lib/cpus/aarch64/cortex_a76ae.h new file mode 100644 index 000000000..9e34efba4 --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_a76ae.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2019, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CORTEX_A76AE_H +#define CORTEX_A76AE_H + +#include <lib/utils_def.h> + +/* Cortex-A76AE MIDR for revision 0 */ +#define CORTEX_A76AE_MIDR U(0x410FD0E0) + +/******************************************************************************* + * CPU Extended Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A76AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7 + +/* Definitions of register field mask in CORTEX_A76AE_CPUPWRCTLR_EL1 */ +#define CORTEX_A76AE_CORE_PWRDN_EN_MASK U(0x1) + +#define CORTEX_A76AE_CPUECTLR_EL1 S3_0_C15_C1_4 + +#endif /* CORTEX_A76AE_H */ |