aboutsummaryrefslogtreecommitdiffstats
path: root/include/bl31
diff options
context:
space:
mode:
authorSoby Mathew <soby.mathew@arm.com>2015-01-13 15:48:26 +0000
committerSoby Mathew <soby.mathew@arm.com>2015-01-26 15:29:32 +0000
commitf4f1ae777b321e5e16ee1ba4591ea9d45845edef (patch)
treec7363c13236627b9d9c12a28c3518d12268fa1d2 /include/bl31
parent07ddb33a8e186c0e1daade975e52beba92a266e7 (diff)
downloadplatform_external_arm-trusted-firmware-f4f1ae777b321e5e16ee1ba4591ea9d45845edef.tar.gz
platform_external_arm-trusted-firmware-f4f1ae777b321e5e16ee1ba4591ea9d45845edef.tar.bz2
platform_external_arm-trusted-firmware-f4f1ae777b321e5e16ee1ba4591ea9d45845edef.zip
Demonstrate model for routing IRQs to EL3
This patch provides an option to specify a interrupt routing model where non-secure interrupts (IRQs) are routed to EL3 instead of S-EL1. When such an interrupt occurs, the TSPD arranges a return to the normal world after saving any necessary context. The interrupt routing model to route IRQs to EL3 is enabled only during STD SMC processing. Thus the pre-emption of S-EL1 is disabled during Fast SMC and Secure Interrupt processing. A new build option TSPD_ROUTE_NS_INT_EL3 is introduced to change the non secure interrupt target execution level to EL3. Fixes ARM-software/tf-issues#225 Change-Id: Ia1e779fbbb6d627091e665c73fa6315637cfdd32
Diffstat (limited to 'include/bl31')
-rw-r--r--include/bl31/interrupt_mgmt.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/bl31/interrupt_mgmt.h b/include/bl31/interrupt_mgmt.h
index 3a2c00c2d..e07ddf83b 100644
--- a/include/bl31/interrupt_mgmt.h
+++ b/include/bl31/interrupt_mgmt.h
@@ -63,7 +63,8 @@
#define INTR_NS_VALID_RM0 0x0
/* Routed to EL1/EL2 from NS and to EL3 from Secure */
#define INTR_NS_VALID_RM1 0x1
-
+/* This is the default routing model */
+#define INTR_DEFAULT_RM 0x0
/*******************************************************************************
* Constants for the _individual_ routing model bits in the 'flags' field for
@@ -123,6 +124,8 @@ int32_t register_interrupt_type_handler(uint32_t type,
interrupt_type_handler_t handler,
uint32_t flags);
interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
+int disable_intr_rm_local(uint32_t type, uint32_t security_state);
+int enable_intr_rm_local(uint32_t type, uint32_t security_state);
#endif /*__ASSEMBLY__*/
#endif /* __INTERRUPT_MGMT_H__ */