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| author | Lionel Debieve <lionel.debieve@st.com> | 2019-09-24 17:49:12 +0200 |
|---|---|---|
| committer | Lionel Debieve <lionel.debieve@st.com> | 2020-01-20 11:32:59 +0100 |
| commit | 7e51e887a71dbdb17c1d666b75c88eacfe8b7903 (patch) | |
| tree | b3a11e5b0306cedbd831ff38d19959f862122812 /fdts | |
| parent | 12e21dfde236407b8253fcde6937f11ca44cb8b0 (diff) | |
| download | platform_external_arm-trusted-firmware-7e51e887a71dbdb17c1d666b75c88eacfe8b7903.tar.gz platform_external_arm-trusted-firmware-7e51e887a71dbdb17c1d666b75c88eacfe8b7903.tar.bz2 platform_external_arm-trusted-firmware-7e51e887a71dbdb17c1d666b75c88eacfe8b7903.zip | |
fdts: stm32mp1: update for FMC2 pin muxing
Include the required FMC2 pinmux definition for the
NAND management.
Change-Id: I80333deacdf3444b2f21f17f2fb5919e569a3591
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Diffstat (limited to 'fdts')
| -rw-r--r-- | fdts/stm32mp157-pinctrl.dtsi | 27 | ||||
| -rw-r--r-- | fdts/stm32mp157c-ev1.dts | 7 |
2 files changed, 29 insertions, 5 deletions
diff --git a/fdts/stm32mp157-pinctrl.dtsi b/fdts/stm32mp157-pinctrl.dtsi index 8e480b2c1..7fd902bd2 100644 --- a/fdts/stm32mp157-pinctrl.dtsi +++ b/fdts/stm32mp157-pinctrl.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (C) STMicroelectronics 2017 - All Rights Reserved + * Copyright (C) STMicroelectronics 2017-2019 - All Rights Reserved * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. */ #include <dt-bindings/pinctrl/stm32-pinfunc.h> @@ -135,6 +135,31 @@ status = "disabled"; }; + fmc_pins_a: fmc-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ + <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */ + <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */ + <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ + <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */ + bias-pull-up; + }; + }; + qspi_bk1_pins_a: qspi-bk1-0 { pins1 { pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ diff --git a/fdts/stm32mp157c-ev1.dts b/fdts/stm32mp157c-ev1.dts index cfde8ed90..51500fadb 100644 --- a/fdts/stm32mp157c-ev1.dts +++ b/fdts/stm32mp157c-ev1.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (C) STMicroelectronics 2017 - All Rights Reserved + * Copyright (C) STMicroelectronics 2017-2019 - All Rights Reserved * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. */ /dts-v1/; @@ -21,15 +21,14 @@ }; &fmc { + pinctrl-names = "default"; + pinctrl-0 = <&fmc_pins_a>; status = "okay"; #address-cells = <1>; #size-cells = <0>; nand: nand@0 { reg = <0>; - nand-on-flash-bbt; - #address-cells = <1>; - #size-cells = <1>; }; }; |