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authorImre Kis <imre.kis@arm.com>2019-10-25 14:29:51 +0200
committerImre Kis <imre.kis@arm.com>2019-11-13 16:36:14 +0000
commit38c078e05c4eebc4c25c9cec5201197ec461bd70 (patch)
tree78108d1e806d8aab82083800982b995c43d00222 /fdts
parent1d2b41614c5675b144ae1f4517c1f8bf249a12d2 (diff)
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Add multithreaded DynamIQ dts file
The new dts file overrides the MPIDR values of the processing elements which were defined in the common dtsi file. The new dts file defines four cores in a single cluster, each core having two threads. Signed-off-by: Imre Kis <imre.kis@arm.com> Change-Id: I0f8d8d250289077aee11eede4508871bb61dbc88
Diffstat (limited to 'fdts')
-rw-r--r--fdts/fvp-base-gicv3-psci-dynamiq-2t.dts41
1 files changed, 41 insertions, 0 deletions
diff --git a/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
new file mode 100644
index 000000000..f35eaf482
--- /dev/null
+++ b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2019, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+/include/ "fvp-base-gicv3-psci-common.dtsi"
+
+&CPU0 {
+ reg = <0x0 0x0>;
+};
+
+&CPU1 {
+ reg = <0x0 0x1>;
+};
+
+&CPU2 {
+ reg = <0x0 0x100>;
+};
+
+&CPU3 {
+ reg = <0x0 0x101>;
+};
+
+&CPU4 {
+ reg = <0x0 0x200>;
+};
+
+&CPU5 {
+ reg = <0x0 0x201>;
+};
+
+&CPU6 {
+ reg = <0x0 0x300>;
+};
+
+&CPU7 {
+ reg = <0x0 0x301>;
+};