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| author | Christophe Kerello <christophe.kerello@st.com> | 2020-07-16 16:57:34 +0200 |
|---|---|---|
| committer | Lionel Debieve <lionel.debieve@st.com> | 2020-10-12 14:46:07 +0200 |
| commit | 0c3e8acbd6fd18c358967d79ecdb91b5bfcdc4a6 (patch) | |
| tree | b5a8c698715dc240a8206987ab5e6e1ac91e6f79 /fdts | |
| parent | 81cf819a97058265b9b8088f96211619bc578f52 (diff) | |
| download | platform_external_arm-trusted-firmware-0c3e8acbd6fd18c358967d79ecdb91b5bfcdc4a6.tar.gz platform_external_arm-trusted-firmware-0c3e8acbd6fd18c358967d79ecdb91b5bfcdc4a6.tar.bz2 platform_external_arm-trusted-firmware-0c3e8acbd6fd18c358967d79ecdb91b5bfcdc4a6.zip | |
drivers: stm32_fmc2_nand: move to new bindings
FMC node bindings are modified to add EBI controller node.
FMC driver and associated device tree files are modified
to support these new bindings.
Change-Id: I4bf201e96a1aca20957e0dac3a3b87caadd05bdc
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Diffstat (limited to 'fdts')
| -rw-r--r-- | fdts/stm32mp151.dtsi | 35 | ||||
| -rw-r--r-- | fdts/stm32mp157c-ev1.dts | 13 |
2 files changed, 34 insertions, 14 deletions
diff --git a/fdts/stm32mp151.dtsi b/fdts/stm32mp151.dtsi index 2eb4a3943..8f175a649 100644 --- a/fdts/stm32mp151.dtsi +++ b/fdts/stm32mp151.dtsi @@ -264,19 +264,34 @@ status = "disabled"; }; - fmc: nand-controller@58002000 { - compatible = "st,stm32mp15-fmc2"; - reg = <0x58002000 0x1000>, - <0x80000000 0x1000>, - <0x88010000 0x1000>, - <0x88020000 0x1000>, - <0x81000000 0x1000>, - <0x89010000 0x1000>, - <0x89020000 0x1000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + fmc: memory-controller@58002000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; clocks = <&rcc FMC_K>; resets = <&rcc FMC_R>; status = "disabled"; + + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + + nand-controller@4,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; qspi: spi@58003000 { diff --git a/fdts/stm32mp157c-ev1.dts b/fdts/stm32mp157c-ev1.dts index 50c0b939b..c5d12e3b2 100644 --- a/fdts/stm32mp157c-ev1.dts +++ b/fdts/stm32mp157c-ev1.dts @@ -24,11 +24,16 @@ pinctrl-names = "default"; pinctrl-0 = <&fmc_pins_a>; status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - nand: nand@0 { - reg = <0>; + nand-controller@4,0 { + status = "okay"; + + nand@0 { + reg = <0>; + nand-on-flash-bbt; + #address-cells = <1>; + #size-cells = <1>; + }; }; }; |