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| author | Alistair Delva <adelva@google.com> | 2021-02-15 12:43:29 -0800 |
|---|---|---|
| committer | Alistair Delva <adelva@google.com> | 2021-02-15 12:44:34 -0800 |
| commit | faa476c0caaa598afa5a6109d17102db5fe35ec6 (patch) | |
| tree | 37a21c69306801ee7cdda5167a30896c8740155b /fdts/fvp-base-gicv3-psci-dynamiq-2t.dts | |
| parent | b00a71fc312c9781fa6f404dccfb55b062b2ccac (diff) | |
| parent | 66306814586b1bf6bcb859aaad218ec3bb090e94 (diff) | |
| download | platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.tar.gz platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.tar.bz2 platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.zip | |
Merge branch 'aosp/upstream-master' into HEADandroid-s-preview-1
This keeps the bl31 interface change reverted which still has not been
fixed in upstream U-Boot for rockchip devices.
Test: CROSS_COMPILE=aarch64-linux-gnu- make PLAT=rk3399 \
DEBUG=0 ERROR_DEPRECATED=1 bl31
Signed-off-by: Alistair Delva <adelva@google.com>
Change-Id: I7c3972a7b767715efb05593096d5d92dba14c609
Diffstat (limited to 'fdts/fvp-base-gicv3-psci-dynamiq-2t.dts')
| -rw-r--r-- | fdts/fvp-base-gicv3-psci-dynamiq-2t.dts | 41 |
1 files changed, 9 insertions, 32 deletions
diff --git a/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts index 48269a065..bda4b8dd4 100644 --- a/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts +++ b/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts @@ -4,38 +4,15 @@ * SPDX-License-Identifier: BSD-3-Clause */ -/dts-v1/; - -#include "fvp-base-gicv3-psci-common.dtsi" - -&CPU0 { - reg = <0x0 0x0>; -}; - -&CPU1 { - reg = <0x0 0x1>; -}; +/* DynamIQ configuration: 1 cluster with up to 8 CPUs with 2 threads per each */ -&CPU2 { - reg = <0x0 0x100>; -}; +/* Set default value if not passed from platform's makefile */ +#ifdef FVP_MAX_PE_PER_CPU +#define PE_PER_CPU FVP_MAX_PE_PER_CPU +#else +#define PE_PER_CPU 2 +#endif -&CPU3 { - reg = <0x0 0x101>; -}; - -&CPU4 { - reg = <0x0 0x200>; -}; - -&CPU5 { - reg = <0x0 0x201>; -}; - -&CPU6 { - reg = <0x0 0x300>; -}; +/dts-v1/; -&CPU7 { - reg = <0x0 0x301>; -}; +#include "fvp-base-gicv3-psci-dynamiq-common.dtsi" |