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authorAndre Przywara <andre.przywara@arm.com>2020-01-25 01:07:19 +0000
committerAndre Przywara <andre.przywara@arm.com>2020-02-25 09:34:38 +0000
commite21a788ee197ec66f6b8552e2274297bf4a095a8 (patch)
tree46174fb95971b3b1bbabeff08b4c0d98dddd2b11 /drivers
parente8ada80a8496806c1f17ccbc6e2beec99d37f6c4 (diff)
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coreboot: Use generic base address
Since now the generic console_t structure holds the UART base address as well, let's use that generic location for the coreboot memory console. This removes the base member from the coreboot specific data structure, but keeps the struct console_cbmc_t and its size member. Change-Id: I7f1dffd41392ba3fe5c07090aea761a42313fb5b Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/coreboot/cbmem_console/aarch64/cbmem_console.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
index fd04c2e7e..a4a7bf8f3 100644
--- a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
+++ b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S
@@ -35,7 +35,7 @@
* -----------------------------------------------
*/
func console_cbmc_register
- str x0, [x1, #CONSOLE_T_CBMC_BASE]
+ str x0, [x1, #CONSOLE_T_BASE]
ldr w2, [x0]
str w2, [x1, #CONSOLE_T_CBMC_SIZE]
mov x0, x1
@@ -54,7 +54,7 @@ endfunc console_cbmc_register
*/
func console_cbmc_putc
ldr w2, [x1, #CONSOLE_T_CBMC_SIZE]
- ldr x1, [x1, #CONSOLE_T_CBMC_BASE]
+ ldr x1, [x1, #CONSOLE_T_BASE]
add x1, x1, #8 /* keep address of body in x1 */
ldr w16, [x1, #-4] /* load cursor (one u32 before body) */
@@ -93,7 +93,7 @@ endfunc console_cbmc_putc
func console_cbmc_flush
mov x5, x30
ldr x1, [x0, #CONSOLE_T_CBMC_SIZE]
- ldr x0, [x0, #CONSOLE_T_CBMC_BASE]
+ ldr x0, [x0, #CONSOLE_T_BASE]
add x1, x1, #8 /* add size of console header */
bl clean_dcache_range /* (clobbers x2 and x3) */
mov x0, #0