aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorYoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>2019-03-11 15:15:25 +0900
committerMarek Vasut <marek.vasut+renesas@gmail.com>2019-04-11 12:57:00 +0200
commitd8e666a35d664132127ad8d641c43b6eec0aeea7 (patch)
treecfba2fcbe1e511ec33d69d80873bbd67533e8921 /drivers
parent8c7155878ccd19f996abff20e791bdc932ed3176 (diff)
downloadplatform_external_arm-trusted-firmware-d8e666a35d664132127ad8d641c43b6eec0aeea7.tar.gz
platform_external_arm-trusted-firmware-d8e666a35d664132127ad8d641c43b6eec0aeea7.tar.bz2
platform_external_arm-trusted-firmware-d8e666a35d664132127ad8d641c43b6eec0aeea7.zip
rcar_gen3: drivers: qos: change subslot cycle
Subslot cycle from 132 to 126 as default setting. Subslot cycle from 264 to 252. [IPL/QoS] - Update H3 Ver.2.0 QoS setting rev.0.21. - Update H3 Ver.3.0 QoS setting rev.0.11. - Update M3 Ver.1.1 QoS setting rev.0.19. - Update M3 Ver.3.0 QoS setting rev.0.02. - Update M3N Ver.1.1 QoS setting rev.0.09. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I52b1bf880163ce03065dc8933d7f193e45cfd9a5
Diffstat (limited to 'drivers')
-rw-r--r--drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c4
-rw-r--r--drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c4
-rw-r--r--drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c4
-rw-r--r--drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c4
-rw-r--r--drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c2
-rw-r--r--drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c4
-rw-r--r--drivers/staging/renesas/rcar/qos/qos_common.h20
7 files changed, 21 insertions, 21 deletions
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index c4f8701cd..c7137de55 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,7 +13,7 @@
#include "qos_init_h3_v20.h"
-#define RCAR_QOS_VERSION "rev.0.20"
+#define RCAR_QOS_VERSION "rev.0.21"
#define QOSWT_TIME_BANK0 (20000000U) /* unit:ns */
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 95f4810f6..ffc9025c2 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,7 +13,7 @@
#include "qos_init_h3_v30.h"
-#define RCAR_QOS_VERSION "rev.0.10"
+#define RCAR_QOS_VERSION "rev.0.11"
#define QOSCTRL_FSS (QOS_BASE1 + 0x0048U)
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index 71e039628..6503b436c 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,7 +13,7 @@
#include "qos_init_h3n_v30.h"
-#define RCAR_QOS_VERSION "rev.0.06"
+#define RCAR_QOS_VERSION "rev.0.07"
#define QOSCTRL_FSS (QOS_BASE1 + 0x0048U)
diff --git a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
index 10fa6b4e2..cee9dd0c9 100644
--- a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2017-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -12,7 +12,7 @@
#include "../qos_reg.h"
#include "qos_init_m3_v11.h"
-#define RCAR_QOS_VERSION "rev.0.18"
+#define RCAR_QOS_VERSION "rev.0.19"
#define QOSWT_TIME_BANK0 (20000000U) /* unit:ns */
diff --git a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
index 319e3934e..e5a31c482 100644
--- a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
@@ -12,7 +12,7 @@
#include "../qos_reg.h"
#include "qos_init_m3_v30.h"
-#define RCAR_QOS_VERSION "rev.0.1"
+#define RCAR_QOS_VERSION "rev.0.02"
#define QOSCTRL_EARLYR (QOS_BASE1 + 0x0060U)
#define QOSCTRL_FSS (QOS_BASE1 + 0x0048U)
diff --git a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
index 52a3ca2ce..bd023e2de 100644
--- a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
+++ b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2017-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -12,7 +12,7 @@
#include "../qos_reg.h"
#include "qos_init_m3n_v10.h"
-#define RCAR_QOS_VERSION "rev.0.08"
+#define RCAR_QOS_VERSION "rev.0.09"
#define QOSCTRL_EARLYR (QOS_BASE1 + 0x0060U)
#define QOSCTRL_FSS (QOS_BASE1 + 0x0048U)
diff --git a/drivers/staging/renesas/rcar/qos/qos_common.h b/drivers/staging/renesas/rcar/qos/qos_common.h
index 89dcf06d6..c3a83ac6f 100644
--- a/drivers/staging/renesas/rcar/qos/qos_common.h
+++ b/drivers/staging/renesas/rcar/qos/qos_common.h
@@ -34,9 +34,9 @@
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
/* define used for M3N */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_M3N (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_M3N (0x7EU) /* 126 */
#else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_M3N (0x108U) /* 264 */
+#define SUB_SLOT_CYCLE_M3N (0xFCU) /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_M3N (SUB_SLOT_CYCLE_M3N -1U)
@@ -46,9 +46,9 @@
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3)
/* define used for H3 */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_H3_20 (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_H3_20 (0x7EU) /* 126 */
#else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_H3_20 (0x108U) /* 264 */
+#define SUB_SLOT_CYCLE_H3_20 (0xFCU) /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_H3_20 (SUB_SLOT_CYCLE_H3_20 -1U)
@@ -64,9 +64,9 @@
#if (RCAR_LSI == RCAR_H3N)
/* define used for H3N */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_H3N (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_H3N (0x7EU) /* 126 */
#else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_H3N (0x108U) /* 264 */
+#define SUB_SLOT_CYCLE_H3N (0xFCU) /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_H3N (SUB_SLOT_CYCLE_H3N -1U)
@@ -77,11 +77,11 @@
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3)
/* define used for M3 */
#if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_M3_11 (0x84U) /* 132 */
-#define SUB_SLOT_CYCLE_M3_30 (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_M3_11 (0x7EU) /* 126 */
+#define SUB_SLOT_CYCLE_M3_30 (0x7EU) /* 126 */
#else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_M3_11 (0x108U) /* 264 */
-#define SUB_SLOT_CYCLE_M3_30 (0x108U) /* 264 */
+#define SUB_SLOT_CYCLE_M3_11 (0xFCU) /* 252 */
+#define SUB_SLOT_CYCLE_M3_30 (0xFCU) /* 252 */
#endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
#define SL_INIT_SSLOTCLK_M3_11 (SUB_SLOT_CYCLE_M3_11 -1U)
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-14 20:44:54 +0000