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| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-03-29 13:19:04 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-03-29 13:19:04 +0100 |
| commit | 875a85aae6b0c9ae411ed899f827c4bbc0703438 (patch) | |
| tree | 0ac09b84c5772a9a32e8cf3eaa9ee84cff7ddcac /drivers | |
| parent | 79c0f525abf91cb963a3aa8476ddafbf22f4fe2e (diff) | |
| parent | 17e84eedb2fb40d8682802cf2e23ddf67928c51d (diff) | |
| download | platform_external_arm-trusted-firmware-875a85aae6b0c9ae411ed899f827c4bbc0703438.tar.gz platform_external_arm-trusted-firmware-875a85aae6b0c9ae411ed899f827c4bbc0703438.tar.bz2 platform_external_arm-trusted-firmware-875a85aae6b0c9ae411ed899f827c4bbc0703438.zip | |
Merge pull request #1333 from jeenu-arm/icfg-fix
GIC: Fix interrupt setting interrupt configuration
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/arm/gic/common/gic_common.c | 11 | ||||
| -rw-r--r-- | drivers/arm/gic/v3/gicv3_helpers.c | 20 |
2 files changed, 20 insertions, 11 deletions
diff --git a/drivers/arm/gic/common/gic_common.c b/drivers/arm/gic/common/gic_common.c index d523772b1..07ed63d74 100644 --- a/drivers/arm/gic/common/gic_common.c +++ b/drivers/arm/gic/common/gic_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -302,12 +302,15 @@ void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri) void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg) { - unsigned bit_num = id & ((1 << ICFGR_SHIFT) - 1); + /* Interrupt configuration is a 2-bit field */ + unsigned int bit_num = id & ((1 << ICFGR_SHIFT) - 1); + unsigned int bit_shift = bit_num << 1; + uint32_t reg_val = gicd_read_icfgr(base, id); /* Clear the field, and insert required configuration */ - reg_val &= ~(GIC_CFG_MASK << bit_num); - reg_val |= ((cfg & GIC_CFG_MASK) << bit_num); + reg_val &= ~(GIC_CFG_MASK << bit_shift); + reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift); gicd_write_icfgr(base, id, reg_val); } diff --git a/drivers/arm/gic/v3/gicv3_helpers.c b/drivers/arm/gic/v3/gicv3_helpers.c index dee63f18a..69c695128 100644 --- a/drivers/arm/gic/v3/gicv3_helpers.c +++ b/drivers/arm/gic/v3/gicv3_helpers.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -232,12 +232,15 @@ void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri) */ void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg) { - unsigned bit_num = id & ((1 << ICFGR_SHIFT) - 1); + /* Interrupt configuration is a 2-bit field */ + unsigned int bit_num = id & ((1 << ICFGR_SHIFT) - 1); + unsigned int bit_shift = bit_num << 1; + uint32_t reg_val = gicr_read_icfgr0(base); /* Clear the field, and insert required configuration */ - reg_val &= ~(GIC_CFG_MASK << bit_num); - reg_val |= ((cfg & GIC_CFG_MASK) << bit_num); + reg_val &= ~(GIC_CFG_MASK << bit_shift); + reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift); gicr_write_icfgr0(base, reg_val); } @@ -248,12 +251,15 @@ void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg) */ void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg) { - unsigned bit_num = id & ((1 << ICFGR_SHIFT) - 1); + /* Interrupt configuration is a 2-bit field */ + unsigned int bit_num = id & ((1 << ICFGR_SHIFT) - 1); + unsigned int bit_shift = bit_num << 1; + uint32_t reg_val = gicr_read_icfgr1(base); /* Clear the field, and insert required configuration */ - reg_val &= ~(GIC_CFG_MASK << bit_num); - reg_val |= ((cfg & GIC_CFG_MASK) << bit_num); + reg_val &= ~(GIC_CFG_MASK << bit_shift); + reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift); gicr_write_icfgr1(base, reg_val); } |