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| author | Grzegorz Jaszczyk <jaz@semihalf.com> | 2017-08-18 16:42:12 +0200 |
|---|---|---|
| committer | Marcin Wojtas <mw@semihalf.com> | 2020-01-30 23:13:07 +0100 |
| commit | 81646055138ed431ca155382ccf7c286f4d52e7f (patch) | |
| tree | a4cfb21a8febed9cb84463959c07319dde58093a /drivers | |
| parent | f69a5828b74ca27bd3872de9c8c6c5a107915c49 (diff) | |
| download | platform_external_arm-trusted-firmware-81646055138ed431ca155382ccf7c286f4d52e7f.tar.gz platform_external_arm-trusted-firmware-81646055138ed431ca155382ccf7c286f4d52e7f.tar.bz2 platform_external_arm-trusted-firmware-81646055138ed431ca155382ccf7c286f4d52e7f.zip | |
plat: marvell: armada: add support for loading MG CM3 images
In order to access MG SRAM, the amb bridge needs to be configured which is
done in bl2 platform init.
For MG CM3, the image is only loaded to its SRAM and the CM3 itself is
left in reset. It is because the next stage bootloader (e.g. u-boot)
will trigger action which will take it out of reset when needed. This
can happen e.g. when appropriate device-tree setup (which has enabled
802.3 auto-neg) will be chosen. In other cases the MG CM3 should not be
running.
Change-Id: I816ea14e3a7174eace068ec44e3cc09998d0337e
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/marvell/mochi/cp110_setup.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/marvell/mochi/cp110_setup.c b/drivers/marvell/mochi/cp110_setup.c index b4b4e0c82..7186f9857 100644 --- a/drivers/marvell/mochi/cp110_setup.c +++ b/drivers/marvell/mochi/cp110_setup.c @@ -303,7 +303,7 @@ static void cp110_axi_attr_init(uintptr_t base) DOMAIN_SYSTEM_SHAREABLE); } -static void amb_bridge_init(uintptr_t base) +void cp110_amb_init(uintptr_t base) { uint32_t reg; @@ -399,7 +399,7 @@ void cp110_init(uintptr_t cp110_base, uint32_t stream_id) cp110_stream_id_init(cp110_base, stream_id); /* Open AMB bridge for comphy for CP0 & CP1*/ - amb_bridge_init(cp110_base); + cp110_amb_init(cp110_base); /* Reset RTC if needed */ cp110_rtc_init(cp110_base); @@ -411,7 +411,7 @@ void cp110_ble_init(uintptr_t cp110_base) #if PCI_EP_SUPPORT INFO("%s: Initialize CPx - base = %lx\n", __func__, cp110_base); - amb_bridge_init(cp110_base); + cp110_amb_init(cp110_base); /* Configure PCIe clock */ cp110_pcie_clk_cfg(cp110_base); |