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author | Andre Przywara <andre.przywara@arm.com> | 2018-09-28 00:43:32 +0100 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2018-10-20 16:23:59 +0100 |
commit | 7db0c96023281d8a530f5e011a232e5d56557437 (patch) | |
tree | 66c6c58e9b33e99aeac87fefa1c7659be02c4940 /drivers | |
parent | 11480b9010d4b188e06395b7ac01b4aa164a110d (diff) | |
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allwinner: Use the arisc to turn off ARM cores
PSCI requires a core to turn itself off, which we can't do properly by
just executing an algorithm on that very core. As a consequence we just
put a core into WFI on CPU_OFF right now.
To fix this let's task the "arisc" management processor (an OpenRISC
core) with that task of asserting reset and turning off the core's power
domain. We use a handcrafted sequence of OpenRISC instructions to
achieve this, and hand this data over to the new sunxi_execute_arisc_code()
routine.
The commented source code for this routine is provided in a separate file,
but the ATF code contains the already encoded instructions as data.
The H6 uses the same algorithm, but differs in the MMIO addresses, so
provide a SoC (family) specific copy of that code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers')
0 files changed, 0 insertions, 0 deletions