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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-06-14 01:58:56 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-06-17 15:05:49 +0200 |
| commit | 126cb4f54ae2e5956052e54aff8da28f9ca26601 (patch) | |
| tree | 5d4683e0dc11e347fa037d49a647fcf0d7238cac /drivers | |
| parent | 91a7cdf3de0e65604045279a6b20b1e7e22fdbb4 (diff) | |
| download | platform_external_arm-trusted-firmware-126cb4f54ae2e5956052e54aff8da28f9ca26601.tar.gz platform_external_arm-trusted-firmware-126cb4f54ae2e5956052e54aff8da28f9ca26601.tar.bz2 platform_external_arm-trusted-firmware-126cb4f54ae2e5956052e54aff8da28f9ca26601.zip | |
rcar_gen3: drivers: qos: M3N: Drop MD pin check
The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Icd3e12f814d4fdcddaec2d1415f0bbf92169284b
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c | 24 |
1 files changed, 2 insertions, 22 deletions
diff --git a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c index cf6d0ad22..2d489f1f6 100644 --- a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c +++ b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c @@ -56,8 +56,6 @@ static void dbsc_setting(void) { - uint32_t md = 0; - /* Register write enable */ io_write_32(DBSC_DBSYSCNT0, 0x00001234U); @@ -68,26 +66,8 @@ static void dbsc_setting(void) io_write_32(DBSC_DBSCHSZ0, 0x00000001); io_write_32(DBSC_DBSCHRW0, 0x22421111); - md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17; - - switch (md) { - case 0x0: - /* DDR3200 */ - io_write_32(DBSC_SCFCTST2, 0x012F1123); - break; - case 0x1: /* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */ - /* DDR2800 */ - io_write_32(DBSC_SCFCTST2, 0x012F1123); - break; - case 0x4: /* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */ - /* DDR2400 */ - io_write_32(DBSC_SCFCTST2, 0x012F1123); - break; - default: /* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */ - /* DDR1600 */ - io_write_32(DBSC_SCFCTST2, 0x012F1123); - break; - } + /* DDR3 */ + io_write_32(DBSC_SCFCTST2, 0x012F1123); /* QoS Settings */ io_write_32(DBSC_DBSCHQOS00, 0x00000F00); |