aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/renesas/common/common.c
diff options
context:
space:
mode:
authorBiju Das <biju.das.jz@bp.renesas.com>2020-12-16 08:57:59 +0000
committerBiju Das <biju.das.jz@bp.renesas.com>2021-01-13 13:03:48 +0000
commit011a4c2f049a422e91ac26d5c146f3a1c7d2d16d (patch)
tree3f0b0880ba828bbd6d9a32b337d836e171e4d283 /drivers/renesas/common/common.c
parentf020963999b8ffed8f2760d9f358acebbb14ab2f (diff)
downloadplatform_external_arm-trusted-firmware-011a4c2f049a422e91ac26d5c146f3a1c7d2d16d.tar.gz
platform_external_arm-trusted-firmware-011a4c2f049a422e91ac26d5c146f3a1c7d2d16d.tar.bz2
platform_external_arm-trusted-firmware-011a4c2f049a422e91ac26d5c146f3a1c7d2d16d.zip
plat: renesas: Move headers and assembly files to common folder
Create a common directory and move the header and assembly files so that the common code can be used by both Renesas R-Car Gen3 and RZ/G2 platforms. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ia9a563a1c3c9f8c6f0d3cb82622deb2e155d7f6c
Diffstat (limited to 'drivers/renesas/common/common.c')
-rw-r--r--drivers/renesas/common/common.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/renesas/common/common.c b/drivers/renesas/common/common.c
new file mode 100644
index 000000000..9b7c1eb16
--- /dev/null
+++ b/drivers/renesas/common/common.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <lib/mmio.h>
+
+#include "rcar_private.h"
+
+#if IMAGE_BL31
+void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval)
+#else
+void cpg_write(uintptr_t regadr, uint32_t regval)
+#endif
+{
+ uint32_t value = regval;
+
+ mmio_write_32((uintptr_t) RCAR_CPGWPR, ~value);
+ mmio_write_32(regadr, value);
+}
+
+#if IMAGE_BL31
+void __attribute__ ((section(".system_ram"))) mstpcr_write(uint32_t mstpcr, uint32_t mstpsr,
+ uint32_t target_bit)
+#else
+void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit)
+#endif
+{
+ uint32_t reg;
+
+ reg = mmio_read_32(mstpcr);
+ reg &= ~target_bit;
+ cpg_write(mstpcr, reg);
+ while ((mmio_read_32(mstpsr) & target_bit) != 0U) {
+ }
+}