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| author | Yann Gautier <yann.gautier@st.com> | 2019-06-04 15:55:37 +0200 |
|---|---|---|
| committer | Yann Gautier <yann.gautier@st.com> | 2019-06-17 14:03:51 +0200 |
| commit | dd98aec87ca83054c9bc7502d018e46b02536eb1 (patch) | |
| tree | 64a6e0de66ab7c1ba538dd25fbdbbc1ae5a17983 /drivers/io/io_semihosting.c | |
| parent | d4151d2ff99cba5a1703b647f84db8882a05eab7 (diff) | |
| download | platform_external_arm-trusted-firmware-dd98aec87ca83054c9bc7502d018e46b02536eb1.tar.gz platform_external_arm-trusted-firmware-dd98aec87ca83054c9bc7502d018e46b02536eb1.tar.bz2 platform_external_arm-trusted-firmware-dd98aec87ca83054c9bc7502d018e46b02536eb1.zip | |
clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the CSG option, the driver needs to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator.
This bit should not be cleared when starting the PLL.
Change-Id: Ie5c720ff03655f27a7e7e9e7ccf8295dd046112f
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Diffstat (limited to 'drivers/io/io_semihosting.c')
0 files changed, 0 insertions, 0 deletions