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| author | Deepika Bhavnani <deepika.bhavnani@arm.com> | 2019-12-13 10:23:18 -0600 |
|---|---|---|
| committer | Deepika Bhavnani <deepika.bhavnani@arm.com> | 2020-01-10 17:11:51 +0000 |
| commit | 5b33ad174a03a5ccdcd6321c64d69167361dc21a (patch) | |
| tree | 9842f133951cf7cfec97ac1f10f9f0a1568c230e /drivers/arm | |
| parent | 22d12c4148c373932a7a81e5d1c59a767e143ac2 (diff) | |
| download | platform_external_arm-trusted-firmware-5b33ad174a03a5ccdcd6321c64d69167361dc21a.tar.gz platform_external_arm-trusted-firmware-5b33ad174a03a5ccdcd6321c64d69167361dc21a.tar.bz2 platform_external_arm-trusted-firmware-5b33ad174a03a5ccdcd6321c64d69167361dc21a.zip | |
Unify type of "cpu_idx" across PSCI module.
NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned int" type.
Issue / Trouble points
1. cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places leading to coverity issues.
2. Underlying platform API's return cpu_idx as `unsigned int`
and comparison is performed with platform specific defines
`PLAFORM_xxx` which is not consistent
Misra Rule 10.4:
The value of a complex expression of integer type may only be cast to
a type that is narrower and of the same signedness as the underlying
type of the expression.
Based on above points, cpu_idx is kept as `unsigned int` to match
the API's and low-level functions and platform defines are updated
where ever required
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
Diffstat (limited to 'drivers/arm')
| -rw-r--r-- | drivers/arm/css/scp/css_pm_scmi.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/arm/css/scp/css_pm_scmi.c b/drivers/arm/css/scp/css_pm_scmi.c index 8dbefa16b..b945cda78 100644 --- a/drivers/arm/css/scp/css_pm_scmi.c +++ b/drivers/arm/css/scp/css_pm_scmi.c @@ -186,7 +186,7 @@ void css_scp_off(const struct psci_power_state *target_state) void css_scp_on(u_register_t mpidr) { unsigned int lvl = 0; - int ret, core_pos; + int core_pos, ret; uint32_t scmi_pwr_state = 0; for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) @@ -196,7 +196,8 @@ void css_scp_on(u_register_t mpidr) SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); core_pos = plat_core_pos_by_mpidr(mpidr); - assert(core_pos >= 0 && core_pos < PLATFORM_CORE_COUNT); + assert((core_pos >= 0) && + (((unsigned int)core_pos) < PLATFORM_CORE_COUNT)); ret = scmi_pwr_state_set(scmi_handle, plat_css_core_pos_to_scmi_dmn_id_map[core_pos], |