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| author | Alistair Delva <adelva@google.com> | 2021-02-16 21:01:22 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2021-02-16 21:01:22 +0000 |
| commit | efb2826bb8160e2d8e0fcec85133a7468484f9fd (patch) | |
| tree | 37a21c69306801ee7cdda5167a30896c8740155b /drivers/arm/gic/v2/gicv2_main.c | |
| parent | b00a71fc312c9781fa6f404dccfb55b062b2ccac (diff) | |
| parent | faa476c0caaa598afa5a6109d17102db5fe35ec6 (diff) | |
| download | platform_external_arm-trusted-firmware-master.tar.gz platform_external_arm-trusted-firmware-master.tar.bz2 platform_external_arm-trusted-firmware-master.zip | |
Merge branch 'aosp/upstream-master' into HEAD am: faa476c0caHEADandroid-s-beta-5android-s-beta-4android-s-beta-3android-s-beta-2android-s-beta-1mastermain-cg-testing-releaseandroid-s-beta-5android-s-beta-4
Original change: https://android-review.googlesource.com/c/platform/external/arm-trusted-firmware/+/1589611
MUST ONLY BE SUBMITTED BY AUTOMERGER
Change-Id: I3a25534ceed4f8e188510641080d8b8ed49b8f62
Diffstat (limited to 'drivers/arm/gic/v2/gicv2_main.c')
| -rw-r--r-- | drivers/arm/gic/v2/gicv2_main.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c index c5bced00d..939d09718 100644 --- a/drivers/arm/gic/v2/gicv2_main.c +++ b/drivers/arm/gic/v2/gicv2_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -247,6 +247,15 @@ void gicv2_end_of_interrupt(unsigned int id) assert(driver_data != NULL); assert(driver_data->gicc_base != 0U); + /* + * Ensure the write to peripheral registers are *complete* before the write + * to GIC_EOIR. + * + * Note: The completion gurantee depends on various factors of system design + * and the barrier is the best core can do by which execution of further + * instructions waits till the barrier is alive. + */ + dsbishst(); gicc_write_EOIR(driver_data->gicc_base, id); } @@ -287,8 +296,8 @@ void gicv2_set_pe_target_mask(unsigned int proc_num) assert(driver_data != NULL); assert(driver_data->gicd_base != 0U); assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < GICV2_MAX_TARGET_PE); + assert(proc_num < driver_data->target_masks_num); /* Return if the target mask is already populated */ if (driver_data->target_masks[proc_num] != 0U) @@ -413,7 +422,8 @@ void gicv2_raise_sgi(int sgi_num, int proc_num) unsigned int sgir_val, target; assert(driver_data != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); + assert(proc_num >= 0); + assert(proc_num < (int)GICV2_MAX_TARGET_PE); assert(driver_data->gicd_base != 0U); /* @@ -421,7 +431,7 @@ void gicv2_raise_sgi(int sgi_num, int proc_num) * should be valid. */ assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < (int)driver_data->target_masks_num); /* Don't raise SGI if the mask hasn't been populated */ target = driver_data->target_masks[proc_num]; @@ -457,8 +467,9 @@ void gicv2_set_spi_routing(unsigned int id, int proc_num) * should be valid. */ assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < (int)GICV2_MAX_TARGET_PE); + assert(driver_data->target_masks_num < INT_MAX); + assert(proc_num < (int)driver_data->target_masks_num); if (proc_num < 0) { /* Target all PEs */ |