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author | Carlo Caione <ccaione@baylibre.com> | 2020-01-24 16:20:15 +0100 |
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committer | Carlo Caione <ccaione@baylibre.com> | 2020-02-06 12:10:47 +0100 |
commit | afd241e71d76470478039388a358d0176491734f (patch) | |
tree | 6bd85296544ab5dc7803886dde0c98557d8aeb68 /docs | |
parent | 378206e90930617de3d01c1672a7a04377fb0092 (diff) | |
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amlogic: axg: Add support for the A113D (AXG) platform
Introduce the preliminary support for the Amlogic A113D (AXG) SoC.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot, Linux and chainloading BL32 (ATOS).
Tested on a A113D board.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic4548fa2f7c48d61b485b2a6517ec36c53c20809
Diffstat (limited to 'docs')
-rw-r--r-- | docs/about/maintainers.rst | 8 | ||||
-rw-r--r-- | docs/plat/meson-axg.rst | 26 |
2 files changed, 34 insertions, 0 deletions
diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst index d9d7f84fd..802dafcd8 100644 --- a/docs/about/maintainers.rst +++ b/docs/about/maintainers.rst @@ -64,6 +64,14 @@ Amlogic Meson S905X2 (G12A) platform port :F: drivers/amlogic/g12a :F: plat/amlogic/g12a/ +Amlogic Meson A113D (AXG) platform port +----------------------------------------- +:M: Carlo Caione <ccaione@baylibre.com> +:G: `carlocaione`_ +:F: docs/plat/meson-axg.rst +:F: drivers/amlogic/axg +:F: plat/amlogic/axg/ + Armv7-A architecture port ------------------------- :M: Etienne Carriere <etienne.carriere@linaro.org> diff --git a/docs/plat/meson-axg.rst b/docs/plat/meson-axg.rst new file mode 100644 index 000000000..8a623bd37 --- /dev/null +++ b/docs/plat/meson-axg.rst @@ -0,0 +1,26 @@ +Amlogic Meson A113D (AXG) +=========================== + +The Amlogic Meson A113D is a SoC with a quad core Arm Cortex-A53 running at +~1.2GHz. It also contains a Cortex-M3 used as SCP. + +This port is a minimal implementation of BL31 capable of booting mainline U-Boot +and Linux: + +- SCPI support. +- Basic PSCI support (CPU_ON, CPU_OFF, SYSTEM_RESET, SYSTEM_OFF). Note that CPU0 + can't be turned off, so there is a workaround to hide this from the caller. +- GICv2 driver set up. +- Basic SIP services (read efuse data, enable/disable JTAG). + +In order to build it: + +.. code:: shell + + CROSS_COMPILE=aarch64-none-elf- make DEBUG=1 PLAT=axg [SPD=opteed] + +This port has been tested on a A113D board. After building it, follow the +instructions in the `U-Boot repository`_, replacing the mentioned **bl31.img** +by the one built from this port. + +.. _U-Boot repository: https://github.com/u-boot/u-boot/blob/master/board/amlogic/s400/README |