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authorAntonio Niño Díaz <antonio.ninodiaz@arm.com>2019-03-01 11:23:58 +0000
committerGitHub <noreply@github.com>2019-03-01 11:23:58 +0000
commita4acc7f16500d7856f3317f8412665249da7e947 (patch)
treed97353d7d44c2335a42e7dd213b606d70d3391da /docs
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parentc2ad38ce4fe754c750f3db480f732ac280f508e4 (diff)
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Merge pull request #1751 from vwadekar/tegra-scatter-file-support
Tegra scatter file support
Diffstat (limited to 'docs')
-rw-r--r--docs/plat/nvidia-tegra.rst10
-rw-r--r--docs/user-guide.rst6
2 files changed, 16 insertions, 0 deletions
diff --git a/docs/plat/nvidia-tegra.rst b/docs/plat/nvidia-tegra.rst
index 7ed0f2c82..6a03b1283 100644
--- a/docs/plat/nvidia-tegra.rst
+++ b/docs/plat/nvidia-tegra.rst
@@ -82,6 +82,16 @@ Tegra132: TLK
Tegra210: TLK and Trusty
Tegra186: Trusty
+Scatter files
+=============
+
+Tegra platforms currently support scatter files and ld.S scripts. The scatter
+files help support ARMLINK linker to generate BL31 binaries. For now, there
+exists a common scatter file, plat/nvidia/tegra/scat/bl31.scat, for all Tegra
+SoCs. The `LINKER` build variable needs to point to the ARMLINK binary for
+the scatter file to be used. Tegra platforms have verified BL31 image generation
+with ARMCLANG (compilation) and ARMLINK (linking) for the Tegra186 platforms.
+
Preparing the BL31 image to run on Tegra SoCs
=============================================
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index b602956aa..d3c63c751 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -729,6 +729,12 @@ Common build options
Note: when ``EL3_EXCEPTION_HANDLING`` is ``1``, ``TSP_NS_INTR_ASYNC_PREEMPT``
must also be set to ``1``.
+- ``USE_ARM_LINK``: This flag determines whether to enable support for ARM
+ linker. When the ``LINKER`` build variable points to the armlink linker,
+ this flag is enabled automatically. To enable support for armlink, platforms
+ will have to provide a scatter file for the BL image. Currently, Tegra
+ platforms use the armlink support to compile BL3-1 images.
+
- ``USE_COHERENT_MEM``: This flag determines whether to include the coherent
memory region in the BL memory map or not (see "Use of Coherent memory in
TF-A" section in `Firmware Design`_). It can take the value 1