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author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-08-30 16:09:30 +0100 |
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committer | GitHub <noreply@github.com> | 2018-08-30 16:09:30 +0100 |
commit | 7bb907e0d9123e060b40b6468acda1e7d95c9143 (patch) | |
tree | 526f4afdace89b978652023795c982b686c29512 /docs | |
parent | 612fa950067dfed6ffd4aa6bbfdf57a31e72775a (diff) | |
parent | 24f671f3a9047b1ea5a989d10342758fa50ac7d7 (diff) | |
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Merge pull request #1544 from jwerner-chromium/JW_handle_ea
context_mgmt: Fix HANDLE_EA_EL3_FIRST implementation
Diffstat (limited to 'docs')
-rw-r--r-- | docs/user-guide.rst | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/docs/user-guide.rst b/docs/user-guide.rst index 5ec932f93..b8bb4a190 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -471,8 +471,10 @@ Common build options .. __: `platform-interrupt-controller-API.rst` .. __: `interrupt-framework-design.rst` -- ``HANDLE_EA_EL3_FIRST``: When defined External Aborts and SError Interrupts - will be always trapped in EL3 i.e. in BL31 at runtime. +- ``HANDLE_EA_EL3_FIRST``: When set to ``1``, External Aborts and SError + Interrupts will be always trapped in EL3 i.e. in BL31 at runtime. When set to + ``0`` (default), these exceptions will be trapped in the current exception + level (or in EL1 if the current exception level is EL0). - ``HW_ASSISTED_COHERENCY``: On most Arm systems to-date, platform-specific software operations are required for CPUs to enter and exit coherency. |