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authordavidcunado-arm <david.cunado@arm.com>2017-10-17 12:18:23 +0100
committerGitHub <noreply@github.com>2017-10-17 12:18:23 +0100
commit5d2f87e8502d2f1dcb0d937c9ad96498e562451d (patch)
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parent446844293399f73bf8ac1fb2e7eba34b0c7fb0c4 (diff)
parentfe3e40ea765432d092cb6abf403b4bf667276cd5 (diff)
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Merge pull request #1126 from robertovargas-arm/psci-v1.1
Update PSCI to v1.1
Diffstat (limited to 'docs')
-rw-r--r--docs/firmware-design.rst16
-rw-r--r--docs/platform-migration-guide.rst11
-rw-r--r--docs/porting-guide.rst38
3 files changed, 60 insertions, 5 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst
index 997d29b87..f28d2f6a8 100644
--- a/docs/firmware-design.rst
+++ b/docs/firmware-design.rst
@@ -886,10 +886,10 @@ Power State Coordination Interface
TODO: Provide design walkthrough of PSCI implementation.
-The PSCI v1.0 specification categorizes APIs as optional and mandatory. All the
-mandatory APIs in PSCI v1.0 and all the APIs in PSCI v0.2 draft specification
+The PSCI v1.1 specification categorizes APIs as optional and mandatory. All the
+mandatory APIs in PSCI v1.1, PSCI v1.0 and in PSCI v0.2 draft specification
`Power State Coordination Interface PDD`_ are implemented. The table lists
-the PSCI v1.0 APIs and their support in generic code.
+the PSCI v1.1 APIs and their support in generic code.
An API implementation might have a dependency on platform code e.g. CPU\_SUSPEND
requires the platform to export a part of the implementation. Hence the level
@@ -898,9 +898,9 @@ platform port as well. The Juno and FVP (all variants) platforms export all the
required support.
+-----------------------------+-------------+-------------------------------+
-| PSCI v1.0 API | Supported | Comments |
+| PSCI v1.1 API | Supported | Comments |
+=============================+=============+===============================+
-| ``PSCI_VERSION`` | Yes | The version returned is 1.0 |
+| ``PSCI_VERSION`` | Yes | The version returned is 1.1 |
+-----------------------------+-------------+-------------------------------+
| ``CPU_SUSPEND`` | Yes\* | |
+-----------------------------+-------------+-------------------------------+
@@ -936,6 +936,12 @@ required support.
+-----------------------------+-------------+-------------------------------+
| ``PSCI_STAT_COUNT`` | Yes\* | |
+-----------------------------+-------------+-------------------------------+
+| ``SYSTEM_RESET2`` | Yes\* | |
++-----------------------------+-------------+-------------------------------+
+| ``MEM_PROTECT`` | Yes\* | |
++-----------------------------+-------------+-------------------------------+
+| ``MEM_PROTECT_CHECK_RANGE`` | Yes\* | |
++-----------------------------+-------------+-------------------------------+
\*Note : These PSCI APIs require platform power management hooks to be
registered with the generic PSCI code to be supported.
diff --git a/docs/platform-migration-guide.rst b/docs/platform-migration-guide.rst
index 638033e44..ca7554693 100644
--- a/docs/platform-migration-guide.rst
+++ b/docs/platform-migration-guide.rst
@@ -158,6 +158,17 @@ for the ``plat_psci_ops`` structure which is declared as :
int (*validate_ns_entrypoint)(unsigned long ns_entrypoint);
void (*get_sys_suspend_power_state)(
psci_power_state_t *req_state);
+ int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,
+ int pwrlvl);
+ int (*translate_power_state_by_mpidr)(u_register_t mpidr,
+ unsigned int power_state,
+ psci_power_state_t *output_state);
+ int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
+ int (*mem_protect_chk)(uintptr_t base, u_register_t length);
+ int (*read_mem_protect)(int *val);
+ int (*write_mem_protect)(int val);
+ int (*system_reset2)(int is_vendor,
+ int reset_type, u_register_t cookie);
} plat_psci_ops_t;
The description of these handlers can be found in the `Porting Guide <porting-guide.rst#user-content-function--plat_setup_psci_ops-mandatory>`__.
diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst
index 6c07b2eb3..cd3bcdae4 100644
--- a/docs/porting-guide.rst
+++ b/docs/porting-guide.rst
@@ -2271,6 +2271,44 @@ appropriate.
Implementations are not expected to handle ``power_levels`` greater than
``PLAT_MAX_PWR_LVL``.
+plat\_psci\_ops.system\_reset2()
+................................
+
+This is an optional function. If implemented this function is
+called during the ``SYSTEM_RESET2`` call to perform a reset
+based on the first parameter ``reset_type`` as specified in
+`PSCI`_. The parameter ``cookie`` can be used to pass additional
+reset information. If the ``reset_type`` is not supported, the
+function must return ``PSCI_E_NOT_SUPPORTED``. For architectural
+resets, all failures must return ``PSCI_E_INVALID_PARAMETERS``
+and vendor reset can return other PSCI error codes as defined
+in `PSCI`_. On success this function will not return.
+
+plat\_psci\_ops.write\_mem\_protect()
+....................................
+
+This is an optional function. If implemented it enables or disables the
+``MEM_PROTECT`` functionality based on the value of ``val``.
+A non-zero value enables ``MEM_PROTECT`` and a value of zero
+disables it. Upon encountering failures it must return a negative value
+and on success it must return 0.
+
+plat\_psci\_ops.read\_mem\_protect()
+.....................................
+
+This is an optional function. If implemented it returns the current
+state of ``MEM_PROTECT`` via the ``val`` parameter. Upon encountering
+failures it must return a negative value and on success it must
+return 0.
+
+plat\_psci\_ops.mem\_protect\_chk()
+...................................
+
+This is an optional function. If implemented it checks if a memory
+region defined by a base address ``base`` and with a size of ``length``
+bytes is protected by ``MEM_PROTECT``. If the region is protected
+then it must return 0, otherwise it must return a negative number.
+
Interrupt Management framework (in BL31)
----------------------------------------