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| author | Paul Beesley <paul.beesley@arm.com> | 2019-10-11 12:52:56 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-10-11 12:52:56 +0000 |
| commit | 7921fe6a764a327b77da5cba8e7eaacaec41fdaa (patch) | |
| tree | e0f14828750f595ee14a7ad836b8a56deea252f4 /docs/security_advisories | |
| parent | 6f0c77f0c7c224b0e4be2aaf3cfedcbdcba9a144 (diff) | |
| parent | be653a6940b6c7bf3c0c6b7049ae829fa70863c1 (diff) | |
| download | platform_external_arm-trusted-firmware-7921fe6a764a327b77da5cba8e7eaacaec41fdaa.tar.gz platform_external_arm-trusted-firmware-7921fe6a764a327b77da5cba8e7eaacaec41fdaa.tar.bz2 platform_external_arm-trusted-firmware-7921fe6a764a327b77da5cba8e7eaacaec41fdaa.zip | |
Merge "doc: Misc syntax and spelling fixes" into integration
Diffstat (limited to 'docs/security_advisories')
| -rw-r--r-- | docs/security_advisories/security-advisory-tfv-6.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/security_advisories/security-advisory-tfv-6.rst b/docs/security_advisories/security-advisory-tfv-6.rst index 495edddae..9eeaeec57 100644 --- a/docs/security_advisories/security-advisory-tfv-6.rst +++ b/docs/security_advisories/security-advisory-tfv-6.rst @@ -51,7 +51,7 @@ the MMU. For Cortex-A73 and Cortex-A75 CPUs, the PRs in this advisory invalidate the branch predictor when entering EL3 by temporarily dropping into AArch32 Secure-EL1 and executing the ``BPIALL`` instruction. This workaround is -signifiantly more complex than the "MMU disable/enable" workaround. The latter +significantly more complex than the "MMU disable/enable" workaround. The latter is not effective at invalidating the branch predictor on Cortex-A73/Cortex-A75. Note that if other privileged software, for example a Rich OS kernel, implements |