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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-01-22 18:35:16 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-01-24 21:36:24 +0900 |
| commit | 8e053dc5ebb5d99ef6e2605e2d57c202123717d4 (patch) | |
| tree | 9a123f567094dc382594b01d13a4095fae8d2b40 /docs/plat | |
| parent | d2184052ec9f7055e666885d2e9f1c563bdd8d93 (diff) | |
| download | platform_external_arm-trusted-firmware-8e053dc5ebb5d99ef6e2605e2d57c202123717d4.tar.gz platform_external_arm-trusted-firmware-8e053dc5ebb5d99ef6e2605e2d57c202123717d4.tar.bz2 platform_external_arm-trusted-firmware-8e053dc5ebb5d99ef6e2605e2d57c202123717d4.zip | |
uniphier: set PROGRAMMABLE_RESET_ADDRESS to disable warm boot mailbox
The warm boot mailbox code is compiled if PROGRAMMABLE_RESET_ADDRESS
is disabled.
The warm boot mailbox is useless for UniPhier SoC family because BL1
is not the first image. The UniPhier platform implements non-TF ROM,
then BL1 works as a pseudo ROM, so it is never executed in the warm
boot.
The reset vector address is not actually programmable for UniPhier
platform, but it should not hurt to enable PROGRAMMABLE_RESET_ADDRESS
to disable the mailbox and remove pointless plat_get_my_entrypoint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'docs/plat')
0 files changed, 0 insertions, 0 deletions