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| author | Alistair Delva <adelva@google.com> | 2021-02-15 12:43:29 -0800 |
|---|---|---|
| committer | Alistair Delva <adelva@google.com> | 2021-02-15 12:44:34 -0800 |
| commit | faa476c0caaa598afa5a6109d17102db5fe35ec6 (patch) | |
| tree | 37a21c69306801ee7cdda5167a30896c8740155b /docs/design/interrupt-framework-design.rst | |
| parent | b00a71fc312c9781fa6f404dccfb55b062b2ccac (diff) | |
| parent | 66306814586b1bf6bcb859aaad218ec3bb090e94 (diff) | |
| download | platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.tar.gz platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.tar.bz2 platform_external_arm-trusted-firmware-faa476c0caaa598afa5a6109d17102db5fe35ec6.zip | |
Merge branch 'aosp/upstream-master' into HEADandroid-s-preview-1
This keeps the bl31 interface change reverted which still has not been
fixed in upstream U-Boot for rockchip devices.
Test: CROSS_COMPILE=aarch64-linux-gnu- make PLAT=rk3399 \
DEBUG=0 ERROR_DEPRECATED=1 bl31
Signed-off-by: Alistair Delva <adelva@google.com>
Change-Id: I7c3972a7b767715efb05593096d5d92dba14c609
Diffstat (limited to 'docs/design/interrupt-framework-design.rst')
| -rw-r--r-- | docs/design/interrupt-framework-design.rst | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/docs/design/interrupt-framework-design.rst b/docs/design/interrupt-framework-design.rst index d155cb356..dfb2eac8e 100644 --- a/docs/design/interrupt-framework-design.rst +++ b/docs/design/interrupt-framework-design.rst @@ -138,6 +138,8 @@ Non-secure interrupts reason to route the interrupt to EL3 software and then hand it back to non-secure software for handling. +.. _EL3 interrupts: + EL3 interrupts ^^^^^^^^^^^^^^ @@ -148,10 +150,8 @@ EL3 interrupts However, when ``EL3_EXCEPTION_HANDLING`` is ``1``, this routing model is invalid as EL3 interrupts are unconditionally routed to EL3, and EL3 - interrupts will always preempt Secure EL1/EL0 execution. See `exception - handling`__ documentation. - - .. __: exception-handling.rst#interrupt-handling + interrupts will always preempt Secure EL1/EL0 execution. See :ref:`exception + handling<interrupt-handling>` documentation. #. **CSS=0, TEL3=1**. Interrupt is routed to EL3 when execution is in Secure-EL1/Secure-EL0. This is a valid routing model as secure software @@ -301,6 +301,8 @@ This section describes in detail the role of each software component (see `Software components`_) during the registration of a handler for an interrupt type. +.. _el3-runtime-firmware: + EL3 runtime firmware ~~~~~~~~~~~~~~~~~~~~ @@ -899,14 +901,14 @@ it is generated during execution in the TSP with ``PSTATE.I`` = 0 when the |Image 2| -Secure payload -~~~~~~~~~~~~~~ +.. _sp-synchronous-int: + +Secure payload interrupt handling +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The SP should implement one or both of the synchronous and asynchronous interrupt handling models depending upon the interrupt routing model it has -chosen (as described in section `Secure Payload`__). - -.. __: #sp-int-registration +chosen (as described in section :ref:`Secure Payload <sp-int-registration>`). In the synchronous model, it should begin handling a Secure-EL1 interrupt after receiving control from the SPD service at an entrypoint agreed upon during build @@ -1011,9 +1013,9 @@ TSP by returning ``SMC_UNK`` error. -------------- -*Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved.* +*Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved.* -.. _SMC calling convention: http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html +.. _SMC calling convention: https://developer.arm.com/docs/den0028/latest .. |Image 1| image:: ../resources/diagrams/sec-int-handling.png .. |Image 2| image:: ../resources/diagrams/non-sec-int-handling.png |