diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2015-07-08 21:45:46 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2015-08-13 23:48:07 +0100 |
| commit | fd650ff61b80a2155002def233ffddb439e3c071 (patch) | |
| tree | 8f5007bc5301e1f8809a8fb2c74e7312a2605912 /bl32/tsp/tsp_interrupt.c | |
| parent | a6bd5ffbb0b8e4c767190a69ed07f3db0a8052d8 (diff) | |
| download | platform_external_arm-trusted-firmware-fd650ff61b80a2155002def233ffddb439e3c071.tar.gz platform_external_arm-trusted-firmware-fd650ff61b80a2155002def233ffddb439e3c071.tar.bz2 platform_external_arm-trusted-firmware-fd650ff61b80a2155002def233ffddb439e3c071.zip | |
PSCI: Migrate SPDs and TSP to the new platform and framework API
The new PSCI frameworks mandates that the platform APIs and the various
frameworks in Trusted Firmware migrate away from MPIDR based core
identification to one based on core index. Deprecated versions of the old
APIs are still present to provide compatibility but their implementations
are not optimal. This patch migrates the various SPDs exisiting within
Trusted Firmware tree and TSP to the new APIs.
Change-Id: Ifc37e7071c5769b5ded21d0b6a071c8c4cab7836
Diffstat (limited to 'bl32/tsp/tsp_interrupt.c')
| -rw-r--r-- | bl32/tsp/tsp_interrupt.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c index 9abe9baa0..139642d09 100644 --- a/bl32/tsp/tsp_interrupt.c +++ b/bl32/tsp/tsp_interrupt.c @@ -49,8 +49,7 @@ ******************************************************************************/ void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3) { - uint64_t mpidr = read_mpidr(); - uint32_t linear_id = platform_get_core_pos(mpidr); + uint32_t linear_id = plat_my_core_pos(); tsp_stats[linear_id].sync_fiq_count++; if (type == TSP_HANDLE_FIQ_AND_RETURN) @@ -59,9 +58,9 @@ void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3) #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); VERBOSE("TSP: cpu 0x%lx sync fiq request from 0x%lx\n", - mpidr, elr_el3); + read_mpidr(), elr_el3); VERBOSE("TSP: cpu 0x%lx: %d sync fiq requests, %d sync fiq returns\n", - mpidr, + read_mpidr(), tsp_stats[linear_id].sync_fiq_count, tsp_stats[linear_id].sync_fiq_ret_count); spin_unlock(&console_lock); @@ -77,8 +76,7 @@ void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3) ******************************************************************************/ int32_t tsp_fiq_handler(void) { - uint64_t mpidr = read_mpidr(); - uint32_t linear_id = platform_get_core_pos(mpidr), id; + uint32_t linear_id = plat_my_core_pos(), id; /* * Get the highest priority pending interrupt id and see if it is the @@ -105,9 +103,9 @@ int32_t tsp_fiq_handler(void) #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); VERBOSE("TSP: cpu 0x%lx handled fiq %d\n", - mpidr, id); + read_mpidr(), id); VERBOSE("TSP: cpu 0x%lx: %d fiq requests\n", - mpidr, tsp_stats[linear_id].fiq_count); + read_mpidr(), tsp_stats[linear_id].fiq_count); spin_unlock(&console_lock); #endif return 0; @@ -115,15 +113,14 @@ int32_t tsp_fiq_handler(void) int32_t tsp_irq_received(void) { - uint64_t mpidr = read_mpidr(); - uint32_t linear_id = platform_get_core_pos(mpidr); + uint32_t linear_id = plat_my_core_pos(); tsp_stats[linear_id].irq_count++; #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); - VERBOSE("TSP: cpu 0x%lx received irq\n", mpidr); + VERBOSE("TSP: cpu 0x%lx received irq\n", read_mpidr()); VERBOSE("TSP: cpu 0x%lx: %d irq requests\n", - mpidr, tsp_stats[linear_id].irq_count); + read_mpidr(), tsp_stats[linear_id].irq_count); spin_unlock(&console_lock); #endif return TSP_PREEMPTED; |