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| author | Soby Mathew <soby.mathew@arm.com> | 2015-01-08 18:02:44 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2015-01-22 10:57:44 +0000 |
| commit | ab8707e6875a9fe447ff04fad9053d7d719f89e6 (patch) | |
| tree | 376a47144a8349f7ce3cdf21a1a12694e7f6bba6 /bl32/tsp/tsp.ld.S | |
| parent | 8c5fe0b5b9f1666b4ddd8f5849de80249cdebe40 (diff) | |
| download | platform_external_arm-trusted-firmware-ab8707e6875a9fe447ff04fad9053d7d719f89e6.tar.gz platform_external_arm-trusted-firmware-ab8707e6875a9fe447ff04fad9053d7d719f89e6.tar.bz2 platform_external_arm-trusted-firmware-ab8707e6875a9fe447ff04fad9053d7d719f89e6.zip | |
Remove coherent memory from the BL memory maps
This patch extends the build option `USE_COHERENT_MEMORY` to
conditionally remove coherent memory from the memory maps of
all boot loader stages. The patch also adds necessary
documentation for coherent memory removal in firmware-design,
porting and user guides.
Fixes ARM-Software/tf-issues#106
Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773
Diffstat (limited to 'bl32/tsp/tsp.ld.S')
| -rw-r--r-- | bl32/tsp/tsp.ld.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/bl32/tsp/tsp.ld.S b/bl32/tsp/tsp.ld.S index 5d7ffa119..d411ad021 100644 --- a/bl32/tsp/tsp.ld.S +++ b/bl32/tsp/tsp.ld.S @@ -98,6 +98,7 @@ SECTIONS *(xlat_table) } >RAM +#if USE_COHERENT_MEM /* * The base address of the coherent memory section must be page-aligned (4K) * to guarantee that the coherent data are stored on their own pages and @@ -116,12 +117,15 @@ SECTIONS . = NEXT(4096); __COHERENT_RAM_END__ = .; } >RAM +#endif __BL32_END__ = .; __BSS_SIZE__ = SIZEOF(.bss); +#if USE_COHERENT_MEM __COHERENT_RAM_UNALIGNED_SIZE__ = __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; +#endif ASSERT(. <= BL32_LIMIT, "BL3-2 image has exceeded its limit.") } |