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author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-07-11 11:13:36 +0100 |
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committer | GitHub <noreply@github.com> | 2018-07-11 11:13:36 +0100 |
commit | 9a93d8ccff0abe225bfabbed7970075640f90de4 (patch) | |
tree | 012ea8874fdad102385555faf820562347c402e8 /bl32/sp_min | |
parent | 89a793425b52c7f563eb07984fd79198471ce61c (diff) | |
parent | 4a98f0ef4c135ce7e1016a3c0fa3d75b6a54630b (diff) | |
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Merge pull request #1460 from robertovargas-arm/clang
Make TF compatible with Clang assembler and linker
Diffstat (limited to 'bl32/sp_min')
-rw-r--r-- | bl32/sp_min/sp_min.ld.S | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index 71de88397..ce6c954ec 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -28,10 +28,19 @@ SECTIONS *entrypoint.o(.text*) *(.text*) *(.vectors) - . = NEXT(PAGE_SIZE); + . = ALIGN(PAGE_SIZE); __TEXT_END__ = .; } >RAM + /* .ARM.extab and .ARM.exidx are only added because Clang need them */ + .ARM.extab . : { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >RAM + + .ARM.exidx . : { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >RAM + .rodata . : { __RODATA_START__ = .; *(.rodata*) @@ -55,7 +64,7 @@ SECTIONS . = ALIGN(8); #include <pubsub_events.h> - . = NEXT(PAGE_SIZE); + . = ALIGN(PAGE_SIZE); __RODATA_END__ = .; } >RAM #else @@ -92,7 +101,7 @@ SECTIONS * read-only, executable. No RW data from the next section must * creep in. Ensure the rest of the current memory block is unused. */ - . = NEXT(PAGE_SIZE); + . = ALIGN(PAGE_SIZE); __RO_END__ = .; } >RAM #endif @@ -207,7 +216,7 @@ SECTIONS * as device memory. No other unexpected data must creep in. * Ensure the rest of the current memory page is unused. */ - . = NEXT(PAGE_SIZE); + . = ALIGN(PAGE_SIZE); __COHERENT_RAM_END__ = .; } >RAM |