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| author | Tejas Patel <tejas.patel@xilinx.com> | 2020-09-01 04:43:53 -0700 |
|---|---|---|
| committer | Manish Pandey <manish.pandey2@arm.com> | 2020-12-07 11:10:13 +0000 |
| commit | b6d7b3e9d616c255ad9ebaea7e029b383a2c9add (patch) | |
| tree | 92e406d36aaae1084dc19636198d2edcd192c664 /bl1/bl1_main.c | |
| parent | 07d8a5f7dc0aed07382cd7d3a276988b2e02b76d (diff) | |
| download | platform_external_arm-trusted-firmware-b6d7b3e9d616c255ad9ebaea7e029b383a2c9add.tar.gz platform_external_arm-trusted-firmware-b6d7b3e9d616c255ad9ebaea7e029b383a2c9add.tar.bz2 platform_external_arm-trusted-firmware-b6d7b3e9d616c255ad9ebaea7e029b383a2c9add.zip | |
plat: xilinx: versal: Add support to get clock rate value
Add support to get clock's rate value.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
Diffstat (limited to 'bl1/bl1_main.c')
0 files changed, 0 insertions, 0 deletions