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| author | Jimmy Brisson <jimmy.brisson@arm.com> | 2019-12-09 14:02:22 -0600 |
|---|---|---|
| committer | Jimmy Brisson <jimmy.brisson@arm.com> | 2020-02-18 08:57:32 -0600 |
| commit | f4744720a00c130bbc46e7cf22af46a3526ee550 (patch) | |
| tree | db98452616c44fad0d77f89aec489d85ac7a2245 | |
| parent | 572fcdd547753d668ca1146ca420664ccc3ac6fb (diff) | |
| download | platform_external_arm-trusted-firmware-f4744720a00c130bbc46e7cf22af46a3526ee550.tar.gz platform_external_arm-trusted-firmware-f4744720a00c130bbc46e7cf22af46a3526ee550.tar.bz2 platform_external_arm-trusted-firmware-f4744720a00c130bbc46e7cf22af46a3526ee550.zip | |
Add CPULib for Klein Core
Change-Id: I686fd623b8264c85434853a2a26ecd71e9eeac01
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_klein.h | 23 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_klein.S | 77 | ||||
| -rw-r--r-- | plat/arm/board/fvp/platform.mk | 1 |
3 files changed, 101 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_klein.h b/include/lib/cpus/aarch64/cortex_klein.h new file mode 100644 index 000000000..729b3bf0a --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_klein.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2020, ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CORTEX_KLEIN_H +#define CORTEX_KLEIN_H + +#define CORTEX_KLEIN_MIDR U(0x410FD460) + +/******************************************************************************* + * CPU Extended Control register specific definitions + ******************************************************************************/ +#define CORTEX_KLEIN_CPUECTLR_EL1 S3_0_C15_C1_4 + +/******************************************************************************* + * CPU Power Control register specific definitions + ******************************************************************************/ +#define CORTEX_KLEIN_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define CORTEX_KLEIN_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) + +#endif /* CORTEX_KLEIN_H */ diff --git a/lib/cpus/aarch64/cortex_klein.S b/lib/cpus/aarch64/cortex_klein.S new file mode 100644 index 000000000..d3a8ab481 --- /dev/null +++ b/lib/cpus/aarch64/cortex_klein.S @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2020, ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <arch.h> +#include <asm_macros.S> +#include <common/bl_common.h> +#include <cortex_klein.h> +#include <cpu_macros.S> +#include <plat_macros.S> + +/* Hardware handled coherency */ +#if HW_ASSISTED_COHERENCY == 0 +#error "Cortex Klein must be compiled with HW_ASSISTED_COHERENCY enabled" +#endif + +/* 64-bit only core */ +#if CTX_INCLUDE_AARCH32_REGS == 1 +#error "Cortex Klein supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" +#endif + + /* ---------------------------------------------------- + * HW will do the cache maintenance while powering down + * ---------------------------------------------------- + */ +func cortex_klein_core_pwr_dwn + /* --------------------------------------------------- + * Enable CPU power down bit in power control register + * --------------------------------------------------- + */ + mrs x0, CORTEX_KLEIN_CPUPWRCTLR_EL1 + orr x0, x0, #CORTEX_KLEIN_CPUPWRCTLR_EL1_CORE_PWRDN_BIT + msr CORTEX_KLEIN_CPUPWRCTLR_EL1, x0 + isb + ret +endfunc cortex_klein_core_pwr_dwn + + /* + * Errata printing function for Cortex Klein. Must follow AAPCS. + */ +#if REPORT_ERRATA +func cortex_klein_errata_report + ret +endfunc cortex_klein_errata_report +#endif + +func cortex_klein_reset_func + /* Disable speculative loads */ + msr SSBS, xzr + isb + ret +endfunc cortex_klein_reset_func + + /* --------------------------------------------- + * This function provides Cortex-Klein specific + * register information for crash reporting. + * It needs to return with x6 pointing to + * a list of register names in ascii and + * x8 - x15 having values of registers to be + * reported. + * --------------------------------------------- + */ +.section .rodata.cortex_klein_regs, "aS" +cortex_klein_regs: /* The ascii list of register names to be reported */ + .asciz "cpuectlr_el1", "" + +func cortex_klein_cpu_reg_dump + adr x6, cortex_klein_regs + mrs x8, CORTEX_KLEIN_CPUECTLR_EL1 + ret +endfunc cortex_klein_cpu_reg_dump + +declare_cpu_ops cortex_klein, CORTEX_KLEIN_MIDR, \ + cortex_klein_reset_func, \ + cortex_klein_core_pwr_dwn diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index 60374352a..65dc5457f 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -122,6 +122,7 @@ else lib/cpus/aarch64/neoverse_zeus.S \ lib/cpus/aarch64/cortex_hercules.S \ lib/cpus/aarch64/cortex_hercules_ae.S \ + lib/cpus/aarch64/cortex_klein.S \ lib/cpus/aarch64/cortex_a65.S \ lib/cpus/aarch64/cortex_a65ae.S endif |