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| author | Manish V Badarkhe <Manish.Badarkhe@arm.com> | 2020-07-28 07:22:30 +0100 |
|---|---|---|
| committer | Manish V Badarkhe <Manish.Badarkhe@arm.com> | 2020-08-18 10:49:27 +0100 |
| commit | cb55615c506d6bff3f1a9223182e190abbbf6fc5 (patch) | |
| tree | b010184a2bd7fc1fc9fdf6c9cbbf6d1d80f6ca86 | |
| parent | fb2072b03d4ef872b30e1c9691ed401b9d124fe1 (diff) | |
| download | platform_external_arm-trusted-firmware-cb55615c506d6bff3f1a9223182e190abbbf6fc5.tar.gz platform_external_arm-trusted-firmware-cb55615c506d6bff3f1a9223182e190abbbf6fc5.tar.bz2 platform_external_arm-trusted-firmware-cb55615c506d6bff3f1a9223182e190abbbf6fc5.zip | |
el3_runtime: Rearrange context offset of EL1 sys registers
SCTLR and TCR registers of EL1 plays role in enabling/disabling of
page table walk for lower ELs (EL0 and EL1).
Hence re-arranged EL1 context offsets to have SCTLR and TCR registers
values one after another in the stack so that these registers values
can be saved and restored using stp and ldp instruction respectively.
Change-Id: Iaa28fd9eba82a60932b6b6d85ec8857a9acd5f8b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
| -rw-r--r-- | include/lib/el3_runtime/aarch64/context.h | 4 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context.S | 12 |
2 files changed, 8 insertions, 8 deletions
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 90807cec6..349041432 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -72,7 +72,7 @@ #define CTX_SPSR_EL1 U(0x0) #define CTX_ELR_EL1 U(0x8) #define CTX_SCTLR_EL1 U(0x10) -#define CTX_ACTLR_EL1 U(0x18) +#define CTX_TCR_EL1 U(0x18) #define CTX_CPACR_EL1 U(0x20) #define CTX_CSSELR_EL1 U(0x28) #define CTX_SP_EL1 U(0x30) @@ -81,7 +81,7 @@ #define CTX_TTBR1_EL1 U(0x48) #define CTX_MAIR_EL1 U(0x50) #define CTX_AMAIR_EL1 U(0x58) -#define CTX_TCR_EL1 U(0x60) +#define CTX_ACTLR_EL1 U(0x60) #define CTX_TPIDR_EL1 U(0x68) #define CTX_TPIDR_EL0 U(0x70) #define CTX_TPIDRRO_EL0 U(0x78) diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S index 548f97794..12e5d4958 100644 --- a/lib/el3_runtime/aarch64/context.S +++ b/lib/el3_runtime/aarch64/context.S @@ -421,7 +421,7 @@ func el1_sysregs_context_save stp x9, x10, [x0, #CTX_SPSR_EL1] mrs x15, sctlr_el1 - mrs x16, actlr_el1 + mrs x16, tcr_el1 stp x15, x16, [x0, #CTX_SCTLR_EL1] mrs x17, cpacr_el1 @@ -440,9 +440,9 @@ func el1_sysregs_context_save mrs x15, amair_el1 stp x14, x15, [x0, #CTX_MAIR_EL1] - mrs x16, tcr_el1 + mrs x16, actlr_el1 mrs x17, tpidr_el1 - stp x16, x17, [x0, #CTX_TCR_EL1] + stp x16, x17, [x0, #CTX_ACTLR_EL1] mrs x9, tpidr_el0 mrs x10, tpidrro_el0 @@ -519,7 +519,7 @@ func el1_sysregs_context_restore ldp x15, x16, [x0, #CTX_SCTLR_EL1] msr sctlr_el1, x15 - msr actlr_el1, x16 + msr tcr_el1, x16 ldp x17, x9, [x0, #CTX_CPACR_EL1] msr cpacr_el1, x17 @@ -537,8 +537,8 @@ func el1_sysregs_context_restore msr mair_el1, x14 msr amair_el1, x15 - ldp x16, x17, [x0, #CTX_TCR_EL1] - msr tcr_el1, x16 + ldp x16, x17, [x0, #CTX_ACTLR_EL1] + msr actlr_el1, x16 msr tpidr_el1, x17 ldp x9, x10, [x0, #CTX_TPIDR_EL0] |