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| author | Andre Przywara <andre.przywara@arm.com> | 2020-09-11 09:18:09 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2020-09-14 18:00:18 +0100 |
| commit | b85359296c4ca6b8a931870a867d5cc658c778ff (patch) | |
| tree | 793381dd65613144f2add0bd3c61e58a029f5af4 | |
| parent | 76a08094c53faac3250b845dc12b4884f7e42d84 (diff) | |
| download | platform_external_arm-trusted-firmware-b85359296c4ca6b8a931870a867d5cc658c778ff.tar.gz platform_external_arm-trusted-firmware-b85359296c4ca6b8a931870a867d5cc658c778ff.tar.bz2 platform_external_arm-trusted-firmware-b85359296c4ca6b8a931870a867d5cc658c778ff.zip | |
SPE: Fix feature detection
Currently the feature test for the SPE extension requires the feature
bits in the ID_AA64DFR0 register to read exactly 0b0001.
However the architecture guarantees that any values greater than 0
indicate the presence of a feature, which is what we are after in
our spe_supported() function.
Change the comparison to include all values greater than 0.
This fixes SPE support in non-secure world on implementations which
include the Scalable Vector Extension (SVE), for instance on Zeus cores.
Change-Id: If6cbd1b72d6abb8a303e2c0a7839d508f071cdbe
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| -rw-r--r-- | lib/extensions/spe/spe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/extensions/spe/spe.c b/lib/extensions/spe/spe.c index 78876c66b..f0d734223 100644 --- a/lib/extensions/spe/spe.c +++ b/lib/extensions/spe/spe.c @@ -25,7 +25,7 @@ bool spe_supported(void) uint64_t features; features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT; - return (features & ID_AA64DFR0_PMS_MASK) == 1U; + return (features & ID_AA64DFR0_PMS_MASK) > 0ULL; } void spe_enable(bool el2_unused) |