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| author | Alex Van Brunt <avanbrunt@nvidia.com> | 2019-07-23 10:00:42 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-08-08 18:53:23 -0700 |
| commit | a4a9547c82b07465d736f25ebdea8b584112addb (patch) | |
| tree | 72567346f417977aced6a69c0653920f5d3af6b3 | |
| parent | 66e0b947c4c4fb851b70b38c757b14f6093faeee (diff) | |
| download | platform_external_arm-trusted-firmware-a4a9547c82b07465d736f25ebdea8b584112addb.tar.gz platform_external_arm-trusted-firmware-a4a9547c82b07465d736f25ebdea8b584112addb.tar.bz2 platform_external_arm-trusted-firmware-a4a9547c82b07465d736f25ebdea8b584112addb.zip | |
lib: cpus: denver: add some MIDR values
This patch adds support for additional Denver MIDRs to
cover all the current SKUs.
Change-Id: I85d0ffe9b3cb351f430ca7d7065a2609968a7a28
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
| -rw-r--r-- | include/lib/cpus/aarch64/denver.h | 4 | ||||
| -rw-r--r-- | lib/cpus/aarch64/denver.S | 28 |
2 files changed, 32 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/denver.h b/include/lib/cpus/aarch64/denver.h index b98abdf4d..b665bc799 100644 --- a/include/lib/cpus/aarch64/denver.h +++ b/include/lib/cpus/aarch64/denver.h @@ -13,6 +13,10 @@ #define DENVER_MIDR_PN2 U(0x4E0F0020) #define DENVER_MIDR_PN3 U(0x4E0F0030) #define DENVER_MIDR_PN4 U(0x4E0F0040) +#define DENVER_MIDR_PN5 U(0x4E0F0050) +#define DENVER_MIDR_PN6 U(0x4E0F0060) +#define DENVER_MIDR_PN7 U(0x4E0F0070) +#define DENVER_MIDR_PN8 U(0x4E0F0080) /* Implementer code in the MIDR register */ #define DENVER_IMPL U(0x4E) diff --git a/lib/cpus/aarch64/denver.S b/lib/cpus/aarch64/denver.S index bdca4c343..d662e7f89 100644 --- a/lib/cpus/aarch64/denver.S +++ b/lib/cpus/aarch64/denver.S @@ -387,3 +387,31 @@ declare_cpu_ops_wa denver, DENVER_MIDR_PN4, \ CPU_NO_EXTRA2_FUNC, \ denver_core_pwr_dwn, \ denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN5, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN6, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN7, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN8, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn |