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| author | Varun Wadekar <vwadekar@nvidia.com> | 2017-10-17 10:53:33 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-11-28 11:14:21 -0800 |
| commit | 4a5524eb3d141451e574c1b375816aa0c44165cc (patch) | |
| tree | f300abd772a77a484523ef81b2595924ed73a7ad | |
| parent | b6533b56db2b1f3f96367604fd9b1e296f62b750 (diff) | |
| download | platform_external_arm-trusted-firmware-4a5524eb3d141451e574c1b375816aa0c44165cc.tar.gz platform_external_arm-trusted-firmware-4a5524eb3d141451e574c1b375816aa0c44165cc.tar.bz2 platform_external_arm-trusted-firmware-4a5524eb3d141451e574c1b375816aa0c44165cc.zip | |
Tegra194: sanity check target cluster during core power on
This patch sanity checks the target cluster value, during core power on,
by comparing it against the maximum number of clusters supported by the
platform.
Reported by: Rohit Khanna <rokhanna@nvidia.com>
Change-Id: I556ce17a58271cc119c86fae0a4d34267f08b338
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
| -rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_psci_handlers.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c index 9e24f4149..47a502a11 100644 --- a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c @@ -312,7 +312,7 @@ int32_t tegra_soc_pwr_domain_on(u_register_t mpidr) MPIDR_AFFINITY_BITS; int32_t ret = 0; - if (target_cluster > MPIDR_AFFLVL1) { + if (target_cluster > ((uint32_t)PLATFORM_CLUSTER_COUNT - 1U)) { ERROR("%s: unsupported CPU (0x%lx)\n", __func__ , mpidr); return PSCI_E_NOT_PRESENT; } |