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| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-05-22 10:34:52 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-05-22 10:34:52 +0100 |
| commit | 41e48fed9a2ccecf7e8a53b8ad5574d038176dd7 (patch) | |
| tree | fe28caab9cd7dc96670c10038e2f8766975e35ce | |
| parent | 29e5c717938328a0047ef970a064b18377832117 (diff) | |
| parent | 79c17995aa7ab385bb97eeff783dd8acd6ca0935 (diff) | |
| download | platform_external_arm-trusted-firmware-41e48fed9a2ccecf7e8a53b8ad5574d038176dd7.tar.gz platform_external_arm-trusted-firmware-41e48fed9a2ccecf7e8a53b8ad5574d038176dd7.tar.bz2 platform_external_arm-trusted-firmware-41e48fed9a2ccecf7e8a53b8ad5574d038176dd7.zip | |
Merge pull request #1393 from geesun/correct_comment
Correct some typo errors in comment
| -rw-r--r-- | include/common/aarch64/el3_common_macros.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index d5f527aa3..03b977e36 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -20,7 +20,7 @@ * * SCTLR_EL3.I: Enable the instruction cache. * - * SCTLR_EL3.SA: Enable Stack Aligment check. A SP alignment fault + * SCTLR_EL3.SA: Enable Stack Alignment check. A SP alignment fault * exception is generated if a load or store instruction executed at * EL3 uses the SP as the base address and the SP is not aligned to a * 16-byte boundary. @@ -186,7 +186,7 @@ * XN (Execute-never). Set to zero so that this control has no * effect on memory access permissions. * - * SCTLR_EL3.SA: Set to zero to disable Stack Aligment check. + * SCTLR_EL3.SA: Set to zero to disable Stack Alignment check. * * SCTLR_EL3.A: Set to zero to disable Alignment fault checking. * ------------------------------------------------------------- |